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公开(公告)号：US12087865B2
公开(公告)日：2024-09-10
申请号：US18176454
申请日：2023-02-28
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L27/12 , H01L29/417 , H01L29/66 , H01L29/786 , H10K59/121
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696 , H10K59/1213
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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公开(公告)号：US11730020B2
公开(公告)日：2023-08-15
申请号：US17342770
申请日：2021-06-09
发明人： Cha Dong Kim , Hee Na Kim , In Kyung Yoo , Sang Jin Lee , Chong Sup Chang
IPC分类号： H01L21/00 , H10K59/122 , H10K59/88 , H10K59/131
CPC分类号： H10K59/122 , H10K59/131 , H10K59/88
摘要： A display device includes a first substrate including a display area and a non-display area, first banks spaced apart from each other in the display area and in the non-display area on the first substrate, electrodes spaced apart from each other on the first banks in the display area, dummy electrodes spaced apart from each other on the first banks in the non-display area, a first pattern between the electrodes in the display area, a second pattern between the dummy electrodes in the non-display area, a first light emitting element on the first pattern, a second light emitting element on the second pattern, contact electrodes respectively on the electrodes in the display area to contact one end of the first light emitting element, and dummy contact electrodes respectively on the dummy electrodes in the non-display area to contact one end of the second light emitting element.
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公开(公告)号：US11302747B2
公开(公告)日：2022-04-12
申请号：US17000031
申请日：2020-08-21
发明人： Eui Kang Heo , Chong Sup Chang
摘要： A display device includes a substrate, a first inner bank and a second inner bank on the substrate and spaced apart from each other, a first electrode on the first inner bank and a second electrode on the second inner bank, and a light emitting element between the first inner bank and the second inner bank, the light emitting element being electrically coupled to the first electrode and the second electrode, wherein the first inner bank comprises a first side surface facing the second inner bank, the second inner bank comprises a second side surface facing the first side surface, and the first side surface and the second side surface are respectively recessed into the first inner bank and the second inner bank, to have a curved shape.
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公开(公告)号：US10185174B2
公开(公告)日：2019-01-22
申请号：US15078426
申请日：2016-03-23
发明人： Hoon Kang , Bum Soo Kam , Sung Won Doh , Chong Sup Chang
IPC分类号： H01L21/00 , G02F1/1335 , H01L27/12
摘要： A thin film transistor substrate, a display device including the same, and a method of manufacturing a thin film transistor substrate. The thin film transistor substrate includes: a base plate including a first area and a second area; a nano uneven pattern formed on one side of the base plate in the first area; a wire grid pattern formed on the ne side of the base plate in the second area; a gate electrode disposed on and overlapping the wire grid pattern; and one of a source electrode and a drain electrode disposed on the gate electrode and overlapping the wire grid pattern.
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公开(公告)号：US11811010B2
公开(公告)日：2023-11-07
申请号：US17661518
申请日：2022-04-29
发明人： Chong Sup Chang , Hyun Ae Kim , Eui Kang Heo
IPC分类号： H01L33/62 , H01L25/075 , H01L29/786 , H01L27/12
CPC分类号： H01L33/62 , H01L25/0753 , H01L27/1214 , H01L29/78633 , H01L2933/0066
摘要： A display device includes a substrate, a first electrode and a second electrode which are spaced apart from each other on the substrate, a first insulating pattern on the substrate to cover at least a portion of each of the first electrode and the second electrode, a light emitting element between the first electrode and the second electrode on the first insulating pattern, a first contact electrode in contact with the first electrode and one end portion of the light emitting element, a second contact electrode in contact with the second electrode and another end portion of the light emitting element, and a second insulating pattern on the light emitting element and of which at least a portion is in contact with each of the first contact electrode and the second contact electrode, wherein the second insulating pattern includes a first upper surface not in contact with the first contact electrode or the second contact electrode.
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公开(公告)号：US11706944B2
公开(公告)日：2023-07-18
申请号：US17078015
申请日：2020-10-22
发明人： Young Seok Baek , Chong Sup Chang , Hana Seo , Eui Kang Heo
IPC分类号： H01L51/52 , H10K50/844 , H10K71/00
CPC分类号： H10K50/844 , H10K71/00
摘要： A method of manufacturing a display device may include sequentially forming a first conductive layer, a second conductive layer including copper (Cu), a third conductive layer, and a fourth conductive layer on a substrate, patterning the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer together to form a conductive pattern including a first layer, a second layer, a third layer, and a fourth layer sequentially on the substrate, removing the fourth layer of the conductive pattern, forming a protective layer covering at least a sidewall of the conductive layer on the substrate, and forming a display element on the protective layer.
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7.发明申请公开(公告)号：US20190198535A1
公开(公告)日：2019-06-27
申请号：US16026742
申请日：2018-07-03
发明人： In Kyung Yoo , Chong Sup Chang , Dong Hyun Yang
IPC分类号： H01L27/12 , H01L21/3213
摘要： A method of manufacturing a display device, includes providing a substrate including a first stepped part, forming a metal layer on the substrate and the first stepped part, forming an organic layer pattern on the metal layer at a position corresponding to a sidewall of the stepped part, forming a photosensitive layer on the metal layer and the organic layer pattern, patterning the photosensitive layer to form a photosensitive layer pattern adjacent to the organic layer pattern, and forming a metal line by removing the organic layer pattern and an exposed portion of the metal layer through an etching process using the photosensitive layer pattern as a mask.
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公开(公告)号：US09768309B2
公开(公告)日：2017-09-19
申请号：US15194841
申请日：2016-06-28
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L27/00 , H01L29/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L27/32
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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9.发明授权Thin film transistor, thin film transistor array panel including the same, and method of manufacturing the same 有权薄膜晶体管，包括其的薄膜晶体管阵列面板及其制造方法公开(公告)号：US09034691B2
公开(公告)日：2015-05-19
申请号：US14468472
申请日：2014-08-26
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang
IPC分类号： H01L21/02 , H01L29/66 , H01L27/12 , H01L29/786 , H01L21/385 , H01L21/441
CPC分类号： H01L29/7869 , H01L21/0262 , H01L21/385 , H01L21/441 , H01L27/1214 , H01L27/1225 , H01L27/1259 , H01L27/1288 , H01L29/41733 , H01L29/66969 , H01L29/786 , H01L29/78633 , H01L29/78696
摘要： A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
摘要翻译： 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。
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10.发明申请THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME 有权薄膜晶体管，包括其的薄膜晶体管阵列面板及其制造方法公开(公告)号：US20140167040A1
公开(公告)日：2014-06-19
申请号：US14184361
申请日：2014-02-19
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
摘要翻译： 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。
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