公开(公告)号：US20240365532A1

公开(公告)日：2024-10-31

申请号：US18507204

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae Jin Park ,  Jun Soo Kim ,  Ji Ho Park ,  Ki Seok Lee ,  Myeong-Dong Lee ,  Ho Sang Lee

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/053 ,  H10B12/315

Abstract: Semiconductor memory devices including capacitors and methods for manufacturing thereof. The semiconductor memory device may include a substrate, an element isolation pattern defining an active area in the substrate, a first conductive pattern on the substrate and the element isolation pattern, and extending in a first direction, wherein the first conductive pattern is connected to a first portion of the active area, a capacitor structure on the substrate and the element isolation pattern and connected to a second portion of the active area, a gate trench defined in the substrate and the element isolation pattern and extending in a second direction, wherein a first trench width of a portion of the gate trench in the active area is greater than a second trench width of a portion of the gate trench in the element isolation pattern.