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公开(公告)号：US12229438B2
公开(公告)日：2025-02-18
申请号：US18149560
申请日：2023-01-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Woo Kim , Songho Yoon , Jeong-Woo Park , Dong-Min Kim , Kyoung Back Lee
IPC: G06F3/06
Abstract: A memory system includes a storage device including a turbo write buffer and a user storage area implemented with a nonvolatile memory, and a host configured to transfer a read request to the storage device. In response to the read request, the storage device transfers read data and read data information including attributes of the read data to the host.
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公开(公告)号：US11573732B2
公开(公告)日：2023-02-07
申请号：US16901332
申请日：2020-06-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dong-Woo Kim , Songho Yoon , Jeong-Woo Park , Dong-Min Kim , Kyoung Back Lee
IPC: G06F3/06
Abstract: A memory system includes a storage device including a turbo write buffer and a user storage area implemented with a nonvolatile memory, and a host configured to transfer a read request to the storage device. In response to the read request, the storage device transfers read data and read data information including attributes of the read data to the host.
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公开(公告)号：US11500800B2
公开(公告)日：2022-11-15
申请号：US17035652
申请日：2020-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dong-Min Kim , Jeong-Woo Park , Wook Han Jeong , Jin Hwan Choi
Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.
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公开(公告)号：US12067296B2
公开(公告)日：2024-08-20
申请号：US18055133
申请日：2022-11-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeong-Woo Park , Dong-Min Kim , Youngmoon Kim , Kyoung Back Lee
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0679
Abstract: A storage device that includes a nonvolatile memory device is described. The storage device includes areas and a controller. The controller receives a write command and data from an external host device. The controller then preferentially writes the data in an area associated with a turbo write based on a turbo write policy, or in an area not associated with a turbo write based on a normal write policy. The controller also receives a move command from the external host device and moves data stored in the area to a different area based on the move command.
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公开(公告)号：US11645007B2
公开(公告)日：2023-05-09
申请号：US16903700
申请日：2020-06-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Songho Yoon , Dong-Min Kim , Youngmoon Kim , Jeong-Woo Park , Kyoung Back Lee
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/0656 , G06F3/0679 , G06F2212/7203
Abstract: A storage device includes a nonvolatile memory device that includes a first region including memory cells configured to store n-bit data and a second region including memory cells configured to store m-bit data and a memory controller, where n and m are natural numbers and n is less than m. The first region includes a first area and a second area, and the second region includes a third area. The memory controller is configured to perform one of a turbo write operation on the first area or the second area and a normal write operation on the third area, and configured to perform one of a turbo read operation on the first area or the second area and a normal read operation on the third area.
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公开(公告)号：US20210034513A1
公开(公告)日：2021-02-04
申请号：US16896638
申请日：2020-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngmoon Kim , Dong-Min Kim , Jeong-Woo Park
IPC: G06F12/02 , G06F12/0873 , G06F9/30 , G06F9/48 , G06F9/54
Abstract: A storage device includes a nonvolatile memory device that includes a first area, a second area, and a third area, and a controller that receives a write command and first data from a host device, preferentially writes the first data in the first area or the second area rather than the third area when the first data is associated with a turbo write, and writes the first data in the first area, the second area, or the third area when the first data is associated with a normal write. The controller moves second data between the first area, the second area, and the third area based on the policy received from the host device.
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公开(公告)号：US11726672B2
公开(公告)日：2023-08-15
申请号：US17505064
申请日：2021-10-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Daejin Jung , Dong-Min Kim , Jeong-Woo Park , Kyoung Back Lee
IPC: G06F3/06
CPC classification number: G06F3/0622 , G06F3/064 , G06F3/0629 , G06F3/0659 , G06F3/0673
Abstract: Provided is a storage device which communicates with a host device and configured to set a secure mode of a plurality of commands different in kind. An operating method of the storage device includes receiving a secure request indicating a protection of a first command and a protection of a second command of the plurality of commands, from the host device; setting a secure mode of the first and second commands, based on the secure request; receiving a first request indicating a request to execute the first command, from the host device; outputting a first response indicating failure of the first command to the host device, based on the first request; receiving a second request indicating a request to execute the second command, from the host device; and outputting a second response indicating failure of the second command to the host device, based on the second request.
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公开(公告)号：US11507312B2
公开(公告)日：2022-11-22
申请号：US16896839
申请日：2020-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeong-Woo Park , Dong-Min Kim , Youngmoon Kim , Kyoung Back Lee
IPC: G06F3/06
Abstract: A storage device that includes a nonvolatile memory device is described. The storage device includes areas and a controller. The controller receives a write command and data from an external host device. The controller then preferentially writes the data in an area associated with a turbo write based on a turbo write policy, or in an area not associated with a turbo write based on a normal write policy. The controller also receives a move command from the external host device and moves data stored in the area to a different area based on the move command.
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公开(公告)号：US20220206693A1
公开(公告)日：2022-06-30
申请号：US17505064
申请日：2021-10-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Daejin JUNG , Dong-Min Kim , Jeong-Woo Park , Kyoung Back Lee
IPC: G06F3/06
Abstract: Provided is a storage device which communicates with a host device and configured to set a secure mode of a plurality of commands different in kind. An operating method of the storage device includes receiving a secure request indicating a protection of a first command and a protection of a second command of the plurality of commands, from the host device; setting a secure mode of the first and second commands, based on the secure request; receiving a first request indicating a request to execute the first command, from the host device; outputting a first response indicating failure of the first command to the host device, based on the first request; receiving a second request indicating a request to execute the second command, from the host device; and outputting a second response indicating failure of the second command to the host device, based on the second request.
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公开(公告)号：US10817445B2
公开(公告)日：2020-10-27
申请号：US16005063
申请日：2018-06-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dong-Min Kim , Jeong-Woo Park , Wook Han Jeong , Jin Hwan Choi
Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit, can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.
