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公开(公告)号：US12223917B2
公开(公告)日：2025-02-11
申请号：US18380419
申请日：2023-10-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seongmin Cheon , Jihyun Ahn , Donghwy Kim , Jong-Kon Bae , Yunpyo Hong
IPC: G09G3/3275 , G09G3/3266
Abstract: A display driving integrated circuit performs an adaptive frame operation. An operation method of the display driving integrated circuit includes outputting current frame data to an external display panel, starting to receive next frame data from an external device after a first time point, the first time point being a time point when a first time period elapses, the first time period immediately following a second time point at which the current frame data are completely output, and generating a vertical synchronization signal at a third time point synchronized with a cycle of an emission control signal, in response to starting to receive the next frame data.
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公开(公告)号：US11810519B2
公开(公告)日：2023-11-07
申请号：US17398947
申请日：2021-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seongmin Cheon , Jihyun Ahn , Donghwy Kim , Jong-Kon Bae , Yunpyo Hong
IPC: G09G3/3275 , G09G3/3266
CPC classification number: G09G3/3275 , G09G3/3266 , G09G2310/0243 , G09G2310/08 , G09G2320/02 , G09G2320/10 , G09G2360/18 , G09G2370/00
Abstract: A display driving integrated circuit performs an adaptive frame operation. An operation method of the display driving integrated circuit includes outputting current frame data to an external display panel, starting to receive next frame data from an external device after a first time point, the first time point being a time point when a first time period elapses, the first time period immediately following a second time point at which the current frame data are completely output, and generating a vertical synchronization signal at a third time point synchronized with a cycle of an emission control signal, in response to starting to receive the next frame data.
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公开(公告)号：US11017725B2
公开(公告)日：2021-05-25
申请号：US16852639
申请日：2020-04-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Taesung Kim , Donghui Kim , Jong-Kon Bae , Dongkyoon Han
IPC: G09G3/3266 , G09G3/3225 , G09G3/3275
Abstract: Provided in various examples are a device and a method, the device comprising: a first pixel group and a second pixel group for converting an electrical signal into an optical signal; a first emission line for transmitting, to the first pixel group, power supplied from the outside; and a second emission line for transmitting the power to the second pixel group, wherein the first emission line and the second emission line are electrically separated from each other. In addition, other examples are also possible.
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公开(公告)号：US09773468B2
公开(公告)日：2017-09-26
申请号：US14178376
申请日：2014-02-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jae-Hyuck Woo , Won-Sik Kang , Yang-Hyo Kim , In-Suk Kim , Jong-Kon Bae
CPC classification number: G09G5/00 , G09G3/20 , G09G3/3685 , G09G2300/0408 , G09G2300/0426 , G09G2310/0275 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291
Abstract: A display driving device includes a first source amplifier that receives first display data and supplies a first pixel voltage to a first pixel based on the received first display data, and a second source amplifier that receives second display data and first control data and supplies a second pixel voltage to a second pixel based on the received second display data and first control data. The second source amplifier has a first stage in which a first process is performed on an input signal based on the second display data, and a second stage in which a second process is performed on the first processed input signal to output the second pixel voltage. The first source amplifier may be configured to conditionally supply the first pixel voltage to the second pixel.
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公开(公告)号：US10803785B2
公开(公告)日：2020-10-13
申请号：US16227300
申请日：2018-12-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yunpyo Hong , Jong-Kon Bae , Yohan Lee , Dongkyoon Han
IPC: G09G3/20 , G06F1/3234 , G09G5/393
Abstract: An electronic device includes a display panel; a processor; and display driving integrated circuitry (DDIC). The DDIC is configured to control the display panel and includes an internal memory. The DDIC is configured to receive, from the processor while the processor operates in an active state, a first content including a plurality of images to be displayed based on a specified order through the display panel while the processor operates in a low-power state; store the first content in the internal memory; change a timing for outputting a signal corresponding to a state capable of receiving a second content based on a change of a location in which an image among the plurality of images is displayed through the display panel while the processor operates in the low-power state; and output the signal to the processor based on the changed timing.
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Patent Agency Ranking
公开(公告)号：US20190189048A1
公开(公告)日：2019-06-20
申请号：US16227300
申请日：2018-12-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yunpyo Hong , Jong-Kon Bae , Yohan Lee , Dongkyoon Han
Abstract: An electronic device includes a display panel; a processor; and display driving integrated circuitry (DDIC). The DDIC is configured to control the display panel and includes an internal memory. The DDIC is configured to receive, from the processor while the processor operates in an active state, a first content including a plurality of images to be displayed based on a specified order through the display panel while the processor operates in a low-power state; store the first content in the internal memory; change a timing for outputting a signal corresponding to a state capable of receiving a second content based on a change of a location in which an image among the plurality of images is displayed through the display panel while the processor operates in the low-power state; and output the signal to the processor based on the changed timing.
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公开(公告)号：US09858886B2
公开(公告)日：2018-01-02
申请号：US14324024
申请日：2014-07-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jong-Kon Bae , Soo-Hyung Kim , Yong-Man Lee , Sung-Dae Cho , Seok-Jin Han
IPC: G09G5/02 , G09G5/00 , G09G3/20 , G09G3/3208 , G09G3/36
CPC classification number: G09G5/00 , G09G3/2003 , G09G3/3208 , G09G3/3611 , G09G5/02 , G09G2330/08 , G09G2330/10 , G09G2360/147
Abstract: Provided is a method for compensating for a defective pixel of a display. The method includes identifying at least one of a plurality of pixels of a display as a defective pixel and compensating for a function of the defective pixel by using at least one pixel from a first pixel group located in a first partial region corresponding to the defective pixel and a second pixel group located in a second partial region located adjacent to the first partial region among a plurality of partial regions, each partial region comprising some adjacent pixels among the plurality of pixels.
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8.发明授权Display driver integrated circuit including first-in-first-out (FIFO) memories configured to receive display data from a distributor and output the display data to graphics memories a display system having the same, and a display data processing method thereof 有权显示驱动器集成电路，包括先入先出（FIFO）存储器，被配置为从分发器接收显示数据，并将显示数据输出到具有其的显示系统的图形存储器，以及显示数据处理方法公开(公告)号：US09240165B2
公开(公告)日：2016-01-19
申请号：US13785832
申请日：2013-03-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jong-Kon Bae , Dokyung Kim , Chulho Kim , Junho Park , Sooyoung Woo , Chiho Cha , Jeung Hwan Lee
CPC classification number: G09G5/39 , G09G5/006 , G09G5/18 , G09G5/393 , G09G2370/08
Abstract: A display driver integrated circuit which includes a distributor configured to output display data; a plurality of first-in first-out (FIFO) memories configured to receive the display data from the distributor according to an external clock and output the display data in response to an internal clock; and a plurality of graphics memories configured to receive the display data from the FIFO memories.
Abstract translation: 一种显示驱动器集成电路，包括配置成输出显示数据的分配器; 多个先进先出（FIFO）存储器，被配置为根据外部时钟从分配器接收显示数据，并响应于内部时钟输出显示数据; 以及配置成从FIFO存储器接收显示数据的多个图形存储器。
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公开(公告)号：US11024693B2
公开(公告)日：2021-06-01
申请号：US16497419
申请日：2018-03-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Joung-Min Cho , Jong-Kon Bae , Kyongrok Kang , Dong Hun Kim , Taesung Kim , Hyunchang Shin , Jungchul An , Song Hee Jung , Kwang-Tai Kim , Hyungsup Byeon
Abstract: According to an embodiment of the present invention, an electronic device may comprise a housing and a display received in at least a portion of the housing, wherein the display comprises: a flexible substrate; a first light-emitting unit which is disposed on a first area of the substrate, has a first attribute, and includes a plurality of first pixels; and a second light-emitting unit which is disposed on a second area of the substrate, has a second attribute different from the first attribute, and includes a plurality of second pixels. Various other embodiments are also possible.
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10.发明授权Buffer circuit having amplifier offset compensation and source driving circuit including the same 有权具有放大器偏移补偿的缓冲电路和包括其的源极驱动电路公开(公告)号：US09577619B2
公开(公告)日：2017-02-21
申请号：US14546376
申请日：2014-11-18
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyung-Tae Kim , Ji-Woon Jung , In-Suk Kim , Jong-Kon Bae , Jae-Hyuck Woo , Won-Sik Kang , Yang-Hyo Kim
IPC: H03L5/00 , H03K5/003 , H03K17/687
CPC classification number: H03K5/003 , G09G3/3688 , G09G2310/027 , G09G2310/0275 , G09G2310/0291 , H03F3/3022 , H03F3/45112 , H03F3/45771 , H03F2203/45212 , H03K17/687
Abstract: Provided are an output buffer circuit having an amplifier offset compensation function and a source driving circuit including the output buffer circuit. The output buffer circuit may include a plurality of channel amplifiers, each of which is configured to adjust an amount of current flowing through transistors connected to at least one of a non-inverted input terminal and an inverted input terminal of a differential input unit to compensate an amplifier offset, and adjust buffer input voltage signals to generate output voltage signals.
Abstract translation: 提供具有放大器偏移补偿功能的输出缓冲电路和包括输出缓冲电路的源极驱动电路。 输出缓冲器电路可以包括多个通道放大器，每个通道放大器被配置为调节流过连接到差分输入单元的非反相输入端子和反相输入端子中的至少一个的晶体管的电流量，以补偿 放大器偏置，并调整缓冲器输入电压信号以产生输出电压信号。
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