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公开(公告)号:US12027588B2
公开(公告)日:2024-07-02
申请号:US18056446
申请日:2022-11-17
发明人: Minhyun Lee , Minsu Seol , Yeonchoo Cho , Hyeonjin Shin
IPC分类号: H01L29/10 , H01L29/24 , H01L29/423
CPC分类号: H01L29/1033 , H01L29/24 , H01L29/42356 , H01L29/42364
摘要: A field effect transistor includes a substrate, a source electrode and a drain electrode on the substrate and apart from each other in a first direction, a plurality of channel layers, a gate insulating film surrounding each of the plurality of channel layers, and a gate electrode surrounding the gate insulating film. Each of the plurality of channel layers has ends contacting the source electrode and the drain electrode. The plurality of channel layers are spaced apart from each other in a second direction away from the substrate. The plurality of channel layers include a 2D semiconductor material.
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公开(公告)号:US11935790B2
公开(公告)日:2024-03-19
申请号:US17370480
申请日:2021-07-08
发明人: Minsu Seol , Minhyun Lee , Junyoung Kwon , Hyeonjin Shin , Minseok Yoo
IPC分类号: H01L21/8234 , H01L21/02 , H01L29/06 , H01L29/16 , H01L29/24 , H01L29/423 , H01L29/66 , H01L29/76 , H01L29/786
CPC分类号: H01L21/823412 , H01L21/02521 , H01L21/02527 , H01L21/02568 , H01L21/0259 , H01L21/823431 , H01L29/0665 , H01L29/1606 , H01L29/24 , H01L29/42392 , H01L29/66045 , H01L29/66969 , H01L29/7606 , H01L29/78696
摘要: Disclosed are a field effect transistor and a method of manufacturing the same. The field effect transistor includes a source electrode on a substrate, a drain electrode separated from the source electrode, and channels connected between the source electrode and the drain electrode, gate insulating layers, and a gate electrode. The channels may have a hollow closed cross-sectional structure when viewed in a first cross-section formed by a plane across the source electrode and the drain electrode in a direction perpendicular to the substrate. The gate insulating layers may be in the channels. The gate electrode may be insulated from the source electrode and the drain electrode by the gate insulating layers.
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公开(公告)号:US11342414B2
公开(公告)日:2022-05-24
申请号:US17001925
申请日:2020-08-25
发明人: Minhyun Lee , Haeryong Kim , Hyeonjin Shin , Seunggeol Nam , Seongjun Park
IPC分类号: H01L29/08 , H01L29/417 , H01L29/04 , H01L29/06 , H01L29/267 , H01L29/78 , H01L21/285 , H01L29/45 , H01L29/16 , H01L29/165
摘要: A semiconductor device includes a semiconductor layer, a metal layer electrically contacting the semiconductor layer, and a two-dimensional material layer between the semiconductor layer and the metal layer and having a two-dimensional crystal structure.
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公开(公告)号:US09922825B2
公开(公告)日:2018-03-20
申请号:US14728583
申请日:2015-06-02
发明人: Minhyun Lee , Hyeonjin Shin , Jaeho Lee , Haeryong Kim
IPC分类号: H01L29/06 , H01L21/02 , H01L29/78 , H01L29/786 , H01L29/66 , H01L29/778 , H01L29/24 , H01L29/41 , H01L29/16
CPC分类号: H01L21/02568 , H01L21/0259 , H01L21/02628 , H01L29/0673 , H01L29/1606 , H01L29/24 , H01L29/413 , H01L29/66742 , H01L29/66969 , H01L29/778 , H01L29/7839 , H01L29/786 , H01L29/78654 , H01L29/78681 , H01L29/78684 , H01L29/78696
摘要: An electronic device includes first and second electrodes that are spaced apart from each other and a 2D material layer. The 2D material layer connects the first and second electrodes. The 2D material layer includes a plurality of 2D nanomaterials. At least some of the 2D nanomaterials overlap one another.
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公开(公告)号:US12062697B2
公开(公告)日:2024-08-13
申请号:US18055565
申请日:2022-11-15
发明人: Minhyun Lee , Minsu Seol , Yeonchoo Cho , Hyeonjin Shin
IPC分类号: H01L29/10 , H01L21/02 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78
CPC分类号: H01L29/1037 , H01L21/02568 , H01L29/408 , H01L29/41791 , H01L29/42364 , H01L29/66795 , H01L29/785
摘要: Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material.
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公开(公告)号:US12034049B2
公开(公告)日:2024-07-09
申请号:US18052017
申请日:2022-11-02
申请人: Samsung Electronics Co., Ltd. , THE UNIVERSITY OF CHICAGO , Center for Technology Licensing at Cornell University
发明人: Minhyun Lee , Jiwoong Park , Saien Xie , Jinseong Heo , Hyeonjin Shin
CPC分类号: H01L29/158 , H01L29/1054
摘要: Provided are a superlattice structure including a two-dimensional material and a device including the superlattice structure. The superlattice structure may include at least two different two-dimensional (2D) materials bonded to each other in a lateral direction, and an interfacial region of the at least two 2D materials may be strained. The superlattice structure may have a bandgap adjusted by the interfacial region that is strained. The at least two 2D materials may include first and second 2D materials. The first 2D material may have a first bandgap in an intrinsic state thereof. The second 2D material may have a second bandgap in an intrinsic state thereof. An interfacial region of the first and second 2D materials and an adjacent region may have a third bandgap between the first bandgap and the second bandgap.
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公开(公告)号:US20230180481A1
公开(公告)日:2023-06-08
申请号:US18062245
申请日:2022-12-06
发明人: Hagyoul Bae , Seungyeul Yang , Minhyun Lee , Jinseong Heo , Taehwan Moon
CPC分类号: H01L27/11597 , H01L27/1159
摘要: A vertical non-volatile memory device may include a plurality of insulating layers and a plurality of conductive layers alternately stacked on a surface of a substrate in a direction perpendicular to the surface of the substrate; a channel layer on the substrate, where the channel layer extends in the direction perpendicular to the surface of the substrate and the channel layer may be on lateral surfaces of the plurality of insulating layers and lateral surfaces of the plurality of conductive layers; and a ferroelectric layer between the channel layer and the lateral surfaces of the plurality of conductive layers.
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公开(公告)号:US10790356B2
公开(公告)日:2020-09-29
申请号:US16152576
申请日:2018-10-05
发明人: Minhyun Lee , Haeryong Kim , Hyeonjin Shin , Seunggeol Nam , Seongjun Park
IPC分类号: H01L29/08 , H01L29/417 , H01L29/04 , H01L29/06 , H01L29/267 , H01L29/78 , H01L21/285 , H01L29/45 , H01L29/16 , H01L29/165
摘要: A semiconductor device includes a semiconductor layer, a metal layer electrically contacting the semiconductor layer, and a two-dimensional material layer between the semiconductor layer and the metal layer and having a two-dimensional crystal structure.
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9.
公开(公告)号:US10217513B2
公开(公告)日:2019-02-26
申请号:US15448998
申请日:2017-03-03
发明人: Minhyun Lee , Seunggeol Nam , Changhyun Kim , Hyeonjin Shin , Yeonchoo Cho , Jinseong Heo , Seongjun Park
摘要: A phase change memory device may include a phase change layer that includes a two-dimensional (2D) material. The phase change layer may include a layered structure that includes one or more layers of 2D material. The phase change layer may be provided between a first electrode and a second electrode, and the phase of at least a portion of one or more of the layers of 2D material may be changed based on an electrical signal applied to the phase change layer through the first electrode and the second electrode. The 2D material may include a chalcogenide-based material or phosphorene. The 2D material may be associated with a phase change temperature that is greater than or equal to about 200° C. and lower than or equal to about 500° C.
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公开(公告)号:US10199469B2
公开(公告)日:2019-02-05
申请号:US15439031
申请日:2017-02-22
发明人: Seunggeol Nam , Hyeonjin Shin , Yeonchoo Cho , Minhyun Lee , Changhyun Kim , Seongjun Park
IPC分类号: H01L29/66 , H01L29/40 , H01L29/78 , H01L21/283 , H01L29/417 , H01L29/45 , H01L29/786
摘要: A semiconductor device includes a silicon semiconductor layer including at least one region doped with a first conductive type dopant, a metal material layer electrically connected to the doped region, and a self-assembled monolayer (SAM) between the doped region and the metal material layer, the SAM forming a molecular dipole on an interface of the silicon semiconductor layer in a direction of reducing a Schottky barrier height (SBH).
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