公开(公告)号：US09728544B2

公开(公告)日：2017-08-08

申请号：US14919083

申请日：2015-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tea Kwang Yu ,  Yong Tae Kim ,  Jae Hyun Park ,  Kyong Sik Yeom

IPC: H01L27/11 ,  H01L27/11536 ,  H01L29/423 ,  H01L29/788 ,  H01L27/11521

CPC classification number: H01L27/11536 ,  H01L27/11521 ,  H01L29/42328 ,  H01L29/7881

Abstract: A method of manufacturing a semiconductor device may include forming split gate structures including a floating gate electrode layer and a control gate electrode layer in a cell region of a substrate including the cell region and a logic region adjacent to the cell region. The method may include sequentially forming a first gate insulating film and a metal gate film in the logic region and the cell region, removing the metal gate film from at least a portion of the cell region and the logic region, forming a second gate insulating film on the first gate insulating film from which the metal gate film has been removed, forming a gate electrode film on the logic region and the cell region, and forming a plurality of memory cell elements disposed in the cell region and a plurality of circuit elements disposed in the logic region.