摘要:
Provided is a 4× framer/deframer module for PCI-Express and a framer/deframer device using the same. In the PCI-Express for high-rate data processing, delimiter and pad processing, and 4× framer shifting and arrangement/reverse arrangement for framing/deframing a frame format are performed to achieve a structure that facilitates reconfiguration and expansion, for example, a pipeline structure, so that the 4× framer/deframer module can operate without delay within a 250 MHz clock even when expansion to 32× is made.
摘要:
A system-on-chip (SoC) test apparatus is disclosed. The system-on-chip (SoC) testing apparatus reduces a test time due to a small amount of overhead in the case of testing an AMBA-based system-on-chip (SoC) using a TIC, an EBI, and a Test Harness, and maintains AMBA- or TIC- compatibility simultaneously while performing scan input/output operations.
摘要:
A system-on-chip (SoC) test apparatus is disclosed. The system-on-chip (SoC) testing apparatus reduces a test time due to a small amount of overhead in the case of testing an AMBA-based system-on-chip (SoC) using a TIC, an EBI, and a Test Harness, and maintains AMBA- or TIC- compatibility simultaneously while performing scan input/output operations.