4X Framer/Deframer Module For PCI-Express and PCI-Express Framer/Deframer Device Using The Same
    1.
    发明申请
    4X Framer/Deframer Module For PCI-Express and PCI-Express Framer/Deframer Device Using The Same 审中-公开
    用于PCI-Express和PCI-Express成帧器/除帧器的4X成帧器/去帧模块

    公开(公告)号:US20080162767A1

    公开(公告)日:2008-07-03

    申请号:US11926446

    申请日:2007-10-29

    IPC分类号: G06F13/14

    CPC分类号: G06F13/4221

    摘要: Provided is a 4× framer/deframer module for PCI-Express and a framer/deframer device using the same. In the PCI-Express for high-rate data processing, delimiter and pad processing, and 4× framer shifting and arrangement/reverse arrangement for framing/deframing a frame format are performed to achieve a structure that facilitates reconfiguration and expansion, for example, a pipeline structure, so that the 4× framer/deframer module can operate without delay within a 250 MHz clock even when expansion to 32× is made.

    摘要翻译: 提供了一种用于PCI-Express的4x成帧器/去帧模块和使用其的成帧器/去帧器件。 在用于高速率数据处理的PCI-Express中,执行定界符和焊盘处理以及用于成帧/解帧的格式的4x成帧器移位和布置/反向布置以实现便于重新配置和扩展的结构,例如管线 结构,使得即使在扩展到32x时,4x成帧器/解帧器模块也能在250 MHz时钟内无延迟地运行。

    Apparatus for testing system-on-chip
    2.
    发明授权
    Apparatus for testing system-on-chip 失效
    片上系统测试装置

    公开(公告)号:US07624320B2

    公开(公告)日:2009-11-24

    申请号:US11727572

    申请日:2007-03-27

    IPC分类号: G01R31/28

    CPC分类号: G01R31/318563 G06F11/2236

    摘要: A system-on-chip (SoC) test apparatus is disclosed. The system-on-chip (SoC) testing apparatus reduces a test time due to a small amount of overhead in the case of testing an AMBA-based system-on-chip (SoC) using a TIC, an EBI, and a Test Harness, and maintains AMBA- or TIC- compatibility simultaneously while performing scan input/output operations.

    摘要翻译: 公开了片上系统(SoC)测试装置。 在使用TIC,EBI和测试线路测试基于AMBA的片上系统(SoC)的情况下,片上系统(SoC)测试设备减少了由于少量开销的测试时间 并且在执行扫描输入/输出操作时同时维持AMBA或TIC兼容性。

    Apparatus for testing system-on-chip
    3.
    发明申请
    Apparatus for testing system-on-chip 失效
    片上系统测试装置

    公开(公告)号:US20080022172A1

    公开(公告)日:2008-01-24

    申请号:US11727572

    申请日:2007-03-27

    IPC分类号: G01R31/28

    CPC分类号: G01R31/318563 G06F11/2236

    摘要: A system-on-chip (SoC) test apparatus is disclosed. The system-on-chip (SoC) testing apparatus reduces a test time due to a small amount of overhead in the case of testing an AMBA-based system-on-chip (SoC) using a TIC, an EBI, and a Test Harness, and maintains AMBA- or TIC- compatibility simultaneously while performing scan input/output operations.

    摘要翻译: 公开了片上系统(SoC)测试装置。 在使用TIC,EBI和测试线路测试基于AMBA的片上系统(SoC)的情况下,片上系统(SoC)测试设备减少了由于少量开销的测试时间 并且在执行扫描输入/输出操作时同时维持AMBA或TIC兼容性。