In-situ method of cleaning vaporizer during dielectric layer deposition process
    2.
    发明授权
    In-situ method of cleaning vaporizer during dielectric layer deposition process 有权
    介电层沉积过程中清洗蒸发器的原位方法

    公开(公告)号:US07824501B2

    公开(公告)日:2010-11-02

    申请号:US11781334

    申请日:2007-07-23

    摘要: Provided is an in-situ method of cleaning a vaporizer of an atomic layer deposition apparatus during a dielectric layer deposition process, to prevent nozzle blocking in the vaporizer and an atomic layer deposition apparatus. During the dielectric layer deposition process, the following steps are repeated: supplying a first source gas for dielectric layer deposition into a chamber of an atomic layer deposition apparatus; purging the first source gas; supplying a second source gas into the chamber of the atomic layer deposition apparatus; purging the second source gas, the in-situ method of cleaning the vaporizer is performed after supplying the first source gas for dielectric layer deposition and before supplying the first source gas again.

    摘要翻译: 提供了一种在电介质层沉积工艺期间清洁原子层沉积设备的蒸发器的原位方法,以防止蒸发器和原子层沉积设备中的喷嘴堵塞。 在电介质层沉积过程中,重复以下步骤:将用于电介质层沉积的第一源气体供应到原子层沉积设备的腔室中; 净化第一源气; 将第二源气体供应到原子层沉积设备的腔室中; 吹扫第二源气体时,在供给用于电介质层沉积的第一源气体并再次供应第一源气体之前执行清洗蒸发器的原位方法。

    IN-SITU METHOD OF CLEANING VAPORIZER DURING DIELECTRIC LAYER DEPOSITION PROCESS
    3.
    发明申请
    IN-SITU METHOD OF CLEANING VAPORIZER DURING DIELECTRIC LAYER DEPOSITION PROCESS 有权
    在介质层沉积过程中清洗蒸发器的现场方法

    公开(公告)号:US20080121184A1

    公开(公告)日:2008-05-29

    申请号:US11781334

    申请日:2007-07-23

    IPC分类号: B08B5/00 C23C16/00

    摘要: Provided is an in-situ method of cleaning a vaporizer of an atomic layer deposition apparatus during a dielectric layer deposition process, to prevent nozzle blocking in the vaporizer and an atomic layer deposition apparatus. During the dielectric layer deposition process, the following steps are repeated: supplying a first source gas for dielectric layer deposition into a chamber of an atomic layer deposition apparatus; purging the first source gas; supplying a second source gas into the chamber of the atomic layer deposition apparatus; purging the second source gas, the in-situ method of cleaning the vaporizer is performed after supplying the first source gas for dielectric layer deposition and before supplying the first source gas again.

    摘要翻译: 提供了一种在电介质层沉积工艺期间清洁原子层沉积设备的蒸发器的原位方法,以防止蒸发器和原子层沉积设备中的喷嘴堵塞。 在电介质层沉积过程中,重复以下步骤:将用于电介质层沉积的第一源气体供应到原子层沉积设备的腔室中; 净化第一源气; 将第二源气体供应到原子层沉积设备的腔室中; 吹扫第二源气体时,在供给用于电介质层沉积的第一源气体并再次供应第一源气体之前执行清洗蒸发器的原位方法。

    Semiconductor Device Including Insulating Layer of Cubic System or Tetragonal System
    4.
    发明申请
    Semiconductor Device Including Insulating Layer of Cubic System or Tetragonal System 有权
    包括立方体或四边形系统的绝缘层的半导体器件

    公开(公告)号:US20090085160A1

    公开(公告)日:2009-04-02

    申请号:US12238822

    申请日:2008-09-26

    IPC分类号: H01L29/92

    摘要: Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode.

    摘要翻译: 本发明提供一种半导体器件,其具有立方晶系或四方晶系的绝缘层,具有良好的电特性。 半导体器件包括:半导体衬底,包括有源区,形成在半导体衬底的有源区中的晶体管,形成在半导体衬底上的层间绝缘层和形成在层间绝缘层中的接触插塞;以及 其电连接到晶体管。 半导体器件可以包括形成在层间绝缘层上并且与电性连接的接触插塞的下电极,形成在下电极上的上电极和立方体系的绝缘层或包括 金属硅酸盐层。 绝缘层可以形成在下电极和上电极之间。

    Semiconductor device including insulating layer of cubic system or tetragonal system
    5.
    发明授权
    Semiconductor device including insulating layer of cubic system or tetragonal system 有权
    半导体器件包括立方体或四方晶系的绝缘层

    公开(公告)号:US08710564B2

    公开(公告)日:2014-04-29

    申请号:US13418472

    申请日:2012-03-13

    IPC分类号: H01L27/108

    摘要: Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode.

    摘要翻译: 本发明提供一种半导体器件,其具有立方晶系或四方晶系的绝缘层,具有良好的电特性。 半导体器件包括:半导体衬底,包括有源区,形成在半导体衬底的有源区中的晶体管,形成在半导体衬底上的层间绝缘层和形成在层间绝缘层中的接触插塞;以及 其电连接到晶体管。 半导体器件可以包括形成在层间绝缘层上并且与电性连接的接触插塞的下电极,形成在下电极上的上电极和立方体系的绝缘层或包括 金属硅酸盐层。 绝缘层可以形成在下电极和上电极之间。

    Methods of fabricating semiconductor devices including multilayer dielectric layers
    6.
    发明授权
    Methods of fabricating semiconductor devices including multilayer dielectric layers 有权
    制造包括多层电介质层的半导体器件的方法

    公开(公告)号:US08399364B2

    公开(公告)日:2013-03-19

    申请号:US13019636

    申请日:2011-02-02

    IPC分类号: H01L21/471

    摘要: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.

    摘要翻译: 公开了制造包括多层电介质层的半导体器件的方法。 所述方法包括在半导体衬底上形成包括金属原子和硅原子的多层电介质层。 多层介电层包括至少两个具有不同硅浓度的结晶金属硅酸盐层。 多层介电层可以用作电容器的介质层,也可以用作非易失性存储器件的阻挡层。

    Semiconductor Device Including Insulating Layer of Cubic System or Tetragonal System
    7.
    发明申请
    Semiconductor Device Including Insulating Layer of Cubic System or Tetragonal System 有权
    包括立方体或四边形系统的绝缘层的半导体器件

    公开(公告)号:US20120168904A1

    公开(公告)日:2012-07-05

    申请号:US13418472

    申请日:2012-03-13

    IPC分类号: H01L29/92

    摘要: Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode.

    摘要翻译: 本发明提供一种半导体器件,其具有立方晶系或四方晶系的绝缘层,具有良好的电特性。 半导体器件包括:半导体衬底,包括有源区,形成在半导体衬底的有源区中的晶体管,形成在半导体衬底上的层间绝缘层和形成在层间绝缘层中的接触插塞;以及 其电连接到晶体管。 半导体器件可以包括形成在层间绝缘层上并且与电性连接的接触插塞的下电极,形成在下电极上的上电极和立方体系的绝缘层或包括 金属硅酸盐层。 绝缘层可以形成在下电极和上电极之间。

    Semiconductor device including insulating layer of cubic system or tetragonal system
    8.
    发明授权
    Semiconductor device including insulating layer of cubic system or tetragonal system 有权
    半导体器件包括立方体或四方晶系的绝缘层

    公开(公告)号:US08159012B2

    公开(公告)日:2012-04-17

    申请号:US12238822

    申请日:2008-09-26

    IPC分类号: H01L27/108

    摘要: Provided is a semiconductor device including an insulating layer of a cubic system or a tetragonal system, having good electrical characteristics. The semiconductor device includes a semiconductor substrate including an active region, a transistor that is formed in the active region of the semiconductor substrate, an interlevel insulating layer that is formed on the semiconductor substrate and a contact plug that is formed in the interlevel insulating layer and that is electrically connected to the transistor. The semiconductor device may include a lower electrode that is formed on the interlevel insulating layer and that is electrically connected to the contact plug, an upper electrode that is formed on the lower electrode and an insulating layer of a cubic system or a tetragonal system including a metal silicate layer. The insulating layer may be formed between the lower electrode and the upper electrode.

    摘要翻译: 本发明提供一种半导体器件,其具有立方晶系或四方晶系的绝缘层,具有良好的电特性。 半导体器件包括:半导体衬底,包括有源区,形成在半导体衬底的有源区中的晶体管,形成在半导体衬底上的层间绝缘层和形成在层间绝缘层中的接触插塞;以及 其电连接到晶体管。 半导体器件可以包括形成在层间绝缘层上并且与电性连接的接触插塞的下电极,形成在下电极上的上电极和立方体系的绝缘层或包括 金属硅酸盐层。 绝缘层可以形成在下电极和上电极之间。

    METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING MULTILAYER DIELECTRIC LAYERS
    9.
    发明申请
    METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING MULTILAYER DIELECTRIC LAYERS 有权
    制造包含多层介质层的半导体器件的方法

    公开(公告)号:US20110230056A1

    公开(公告)日:2011-09-22

    申请号:US13019636

    申请日:2011-02-02

    IPC分类号: H01L21/471

    摘要: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.

    摘要翻译: 公开了制造包括多层电介质层的半导体器件的方法。 所述方法包括在半导体衬底上形成包括金属原子和硅原子的多层电介质层。 多层介电层包括至少两个具有不同硅浓度的结晶金属硅酸盐层。 多层介电层可以用作电容器的介质层,也可以用作非易失性存储器件的阻挡层。