公开(公告)号：US07116950B2

公开(公告)日：2006-10-03

申请号：US10073029

申请日：2002-02-12

申请人： Satoshi Tanaka ,  Masamichi Tanabe ,  Yasuyuki Okuma ,  Taizo Yamawaki ,  Koichi Yahagi ,  Hiroaki Matsui ,  Robert Astle Henshaw

发明人： Satoshi Tanaka ,  Masamichi Tanabe ,  Yasuyuki Okuma ,  Taizo Yamawaki ,  Koichi Yahagi ,  Hiroaki Matsui ,  Robert Astle Henshaw

IPC分类号： H04B1/04

CPC分类号： H03D7/1433 ,  H03C3/40 ,  H03D7/145 ,  H03D7/1458 ,  H03D2200/0025 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0047

摘要： A transmitter is provided which includes a transmitting circuit that does not require a high-performance low noise VCO restricting cost reduction thereof and that can reduce the number of parts without requiring an RF filter. A direct conversion that does not require a transmission VCO is applied to the transmitting circuit. In order to achieve noise reduction in a receiving band, low-pass filters are provided a IQ input sections of a modulator that converts IQ signals into RF signals. In comparison with a conventional transmitter using offset PLL, an external VCO required in addition to an RF integrated circuit, a power amplifier, and a front end circuit is reduced. Even in current transistor performance, by using a filter having rapid waveform characteristics such as a SAW more inexpensive than the VCO, or the like, it is possible to provide a GSM/GSM 1800/GSM1900 triple band transmitter.

摘要翻译： 提供一种发送器，其包括不需要高性能低噪声VCO来限制其成本降低并且可以减少部件数量而不需要RF滤波器的发送电路。 将不需要传输VCO的直接转换应用于发送电路。 为了实现接收频带中的噪声降低，提供了将IQ信号转换成RF信号的调制器的IQ输入部分的低通滤波器。 与使用偏移PLL的常规发射机相比，减少了RF集成电路，功率放大器和前端电路之外需要的外部VCO。 即使在目前的晶体管性能中，通过使用具有比VCO更便宜的SAW等具有快速波形特性的滤波器等，也可以提供GSM / GSM 1800 / GSM1900三频发射机。

公开(公告)号：US20070021076A1

公开(公告)日：2007-01-25

申请号：US11529326

申请日：2006-09-29

申请人： Satoshi Tanaka ,  Masamichi Tanabe ,  Yasuyuki Okuma ,  Taizo Yamawaki ,  Koichi Yahagi ,  Hiroaki Matsui ,  Robert Henshaw

发明人： Satoshi Tanaka ,  Masamichi Tanabe ,  Yasuyuki Okuma ,  Taizo Yamawaki ,  Koichi Yahagi ,  Hiroaki Matsui ,  Robert Henshaw

IPC分类号： H04B1/04 ,  H01Q11/12

CPC分类号： H03D7/1433 ,  H03C3/40 ,  H03D7/145 ,  H03D7/1458 ,  H03D2200/0025 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0047

摘要： A transmitter is provided which includes a transmitting circuit that does not require a high-performance low noise VCO restricting cost reduction thereof and that can reduce the number of parts without requiring an RF filter. A direct conversion that does not require a transmission VCO is applied to the transmitting circuit. In order to achieve noise reduction in a receiving band, low-pass filters are provided at IQ input sections of a modulator that converts IQ signals into RF signals. In comparison with a conventional transmitter using offset PLL, an external VCO required in addition to an RF integrated circuit, a power amplifier, and a front end circuit is reduced. Even in current transistor performance, by using a filter having rapid waveform characteristics such as a SAW more inexpensive than the VCO, or the like, it is possible to provide a GSM/GSM 1800/GSM1900 triple band transmitter.

摘要翻译： 提供一种发送器，其包括不需要高性能低噪声VCO来限制其成本降低并且可以减少部件数量而不需要RF滤波器的发送电路。 将不需要传输VCO的直接转换应用于发送电路。 为了实现接收频带的降噪，在将IQ信号转换为RF信号的调制器的IQ输入部分提供低通滤波器。 与使用偏移PLL的常规发射机相比，减少了RF集成电路，功率放大器和前端电路之外需要的外部VCO。 即使在目前的晶体管性能中，通过使用具有比VCO更便宜的SAW等具有快速波形特性的滤波器等，也可以提供GSM / GSM 1800 / GSM1900三频发射机。

公开(公告)号：US07386064B2

公开(公告)日：2008-06-10

申请号：US10494245

申请日：2002-11-06

申请人： Koichi Yahagi ,  Ryoji Furuya ,  Fumiaki Matsuzaki ,  Robert Astle Henshaw

发明人： Koichi Yahagi ,  Ryoji Furuya ,  Fumiaki Matsuzaki ,  Robert Astle Henshaw

IPC分类号： H03D3/18

CPC分类号： H03L7/107 ,  H03L7/0898 ,  H03L7/10

摘要： In one embodiment, a PLL circuit is provided with a plurality of pull-in operation modes for pulling a voltage across a filter capacitor (C1, C2) in a lock-up voltage, and with a register (CRG) for designating one of the plurality of pull-in operation modes. The pull-in operation is performed in accordance with a setting value in the register.

摘要翻译： 在一个实施例中，PLL电路具有多个拉入操作模式，用于在锁定电压下拉过滤波电容器（C 1，C 2）上的电压，并具有用于指定一个的寄存器（CRG） 的多个拉入操作模式。 根据寄存器的设定值进行拉入动作。

公开(公告)号：US20050014476A1

公开(公告)日：2005-01-20

申请号：US10495061

申请日：2002-10-16

申请人： Masachika Oono ,  Hiroaki Matsui ,  Koichi Yahagi

发明人： Masachika Oono ,  Hiroaki Matsui ,  Koichi Yahagi

IPC分类号： H03C3/40 ,  H04B1/04 ,  H04B1/30 ,  H04B1/40 ,  H04L27/00 ,  H04L27/20 ,  H04L27/32 ,  H04L27/36 ,  H04B1/02 ,  H04B1/66

CPC分类号： H04B1/005 ,  H03C3/40 ,  H04B1/04 ,  H04B1/0458 ,  H04B1/30 ,  H04B1/406 ,  H04L27/2064 ,  H04L27/32 ,  H04L27/362 ,  H04L2027/0016

摘要： An orthogonal modulating circuit for modulating signals of two oscillation frequencies differing in phase by 90° with transmission data (I and Q) is used in common for a plurality of bands, an LC resonance circuit comprising inductances L and a capacitor C is used as the output load on the orthogonal modulating circuit instead of resistors commonly used according to the prior art, and the values of L or C constituting the resonance circuit are switched over between each other according to the transmission band.

摘要翻译： 将用于将发射数据（I和Q）的相位不同相位的两个振荡频率的信号用于多个频带的正交调制电路被共同使用，包括电感L和电容器C的LC谐振电路被用作 在正交调制电路上的输出负载代替根据现有技术常用的电阻器，并且构成谐振电路的L或C的值根据传输频带在彼此之间切换。

公开(公告)号：US07333565B2

公开(公告)日：2008-02-19

申请号：US10495061

申请日：2002-10-16

申请人： Masachika Oono ,  Hiroaki Matsui ,  Koichi Yahagi

发明人： Masachika Oono ,  Hiroaki Matsui ,  Koichi Yahagi

IPC分类号： H04L27/12

CPC分类号： H04B1/005 ,  H03C3/40 ,  H04B1/04 ,  H04B1/0458 ,  H04B1/30 ,  H04B1/406 ,  H04L27/2064 ,  H04L27/32 ,  H04L27/362 ,  H04L2027/0016

摘要： An orthogonal modulating circuit for modulating signals of two oscillation frequencies differing in phase by 90° with transmission data (I and Q) is used in common for a plurality of bands, an LC resonance circuit comprising inductances L and a capacitor C is used as the output load on the orthogonal modulating circuit instead of resistors commonly used according to the prior art, and the values of L or C constituting the resonance circuit are switched over between each other according to the transmission band.

摘要翻译： 将用于将发射数据（I和Q）的相位不同相位的两个振荡频率的信号用于多个频带的正交调制电路被共同使用，包括电感L和电容器C的LC谐振电路被用作 在正交调制电路上的输出负载代替根据现有技术常用的电阻器，并且构成谐振电路的L或C的值根据传输频带在彼此之间切换。

公开(公告)号：US09024940B2

公开(公告)日：2015-05-05

申请号：US13273400

申请日：2011-10-14

申请人： Yoshiki Kawaoka ,  Koichi Yahagi

发明人： Yoshiki Kawaoka ,  Koichi Yahagi

IPC分类号： G06T15/00 ,  G06T15/20 ,  H04N13/00

CPC分类号： G06T15/205 ,  H04N13/128 ,  H04N2213/002

摘要： A three-dimensional (3D) image display device enables easy recognition of a 3D image by appropriately changing the popout amount of a 3D image. The display device includes a timer setting and measuring a given time over which the popout amount of a 3D image changes, a popout amount change mode memory storing information on time dependent change of the popout amount occurring over the given time, a popout amount controller producing the popout amount for each unit time based on parallax between a plurality of images, the given time, and the time dependent change information, a changing image producer producing pairs of popout-amount-changing images from the plurality of images according to a popout amount by the unit time, a 3D image producer producing a corresponding popout-amount-changing 3D image, and a display controller.

摘要翻译： 三维（3D）图像显示装置通过适当地改变3D图像的弹出量，能够容易地识别3D图像。 该显示装置包括定时器设定和测量3D图像的弹出量变化的给定时间，存储存储关于在给定时间内出现的弹出量的随时间变化的信息的弹出量改变模式存储器，产生 基于多个图像之间的视差，给定时间和与时间相关的改变信息的每个单位时间的弹出量，改变图像生成器，根据弹出量产生产生来自多个图像的弹出量改变图像对 单位时间，产生相应的弹出量变化3D图像的3D图像生成器和显示控制器。

公开(公告)号：US08015503B2

公开(公告)日：2011-09-06

申请号：US11727790

申请日：2007-03-28

申请人： Koichi Yahagi

发明人： Koichi Yahagi

IPC分类号： G06F3/048

CPC分类号： G06F17/5086 ,  G06F2217/02 ,  Y10S715/964

摘要： To solve an overlap between a part table and components automatically and adequately in a drawing using a CAD. In a part table creating method for creating a part table including a plurality of rows of CAD data, an overlap between the part table and other geometric elements is detected. When the overlap is detected, the height of the respective rows of the part table is reduced to H1. When the overlap between the part table and the other geometric elements still remains even when the respective rows of the part table is reduced to the height H1, the number of overlapped rows between the part table and the geometric element are obtained. The portion of the overlapped rows is separated and moved in the direction to avoid the overlap with the geometric elements to separate into an original part table and a destination part table.

摘要翻译： 使用CAD在图形中自动和充分地解决零件表和零件之间的重叠。 在用于创建包括多行CAD数据的零件表的零件表创建方法中，检测零件表与其他几何元素之间的重叠。 当检测到重叠时，部件表的各行的高度减小到H1。 当零件表和其他几何元素之间的重叠仍然保持甚至当零件表的相应行减小到高度H1时，获得零件表与几何元素之间的重叠行数。 重叠行的部分被分离并在方向上移动以避免与几何元素重叠以分离成原始部分表和目的地部分表。

公开(公告)号：US07961821B2

公开(公告)日：2011-06-14

申请号：US12276532

申请日：2008-11-24

申请人： Toshihito Habuka ,  Naoto Inokawa ,  Kiyoharu Ozaki ,  Tatsuji Matsuura ,  Koichi Yahagi

发明人： Toshihito Habuka ,  Naoto Inokawa ,  Kiyoharu Ozaki ,  Tatsuji Matsuura ,  Koichi Yahagi

IPC分类号： H04L27/08

CPC分类号： H04L27/3809 ,  H03G3/3068 ,  H04L25/061 ,  H04L27/2647

摘要： A D.C. offset canceling and gain adjusting techniques permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a radio communication system are provided. A communication semiconductor integrated circuit has a plurality of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level. Offset cancellation values are generated by detecting D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers when starting reception and altering the gain. Gain setting in a high gain amplifying section is accomplished using rough and precise settings.

摘要翻译： 提供了D.C.偏移消除和增益调整技术，其允许完成D.C.偏移的校正和用于在无线电通信系统中放大接收信号的放大器的增益调整。 通信半导体集成电路具有多个交替连接的多个低通滤波器和可变增益放大器，以及用于将接收信号放大到预定幅度电平的高增益放大器电路。 通过根据设定的增益检测用于放大接收信号的放大器的直流偏移量，并将其存储到存储器中，并从存储器中读出以消除开始接收和改变增益时放大器的直流偏移量来产生偏移抵消值。 高增益放大部分的增益设置是通过粗略和精确的设置实现的。

公开(公告)号：US20070087716A1

公开(公告)日：2007-04-19

申请号：US11637759

申请日：2006-12-13

申请人： Masumi Kasahara ,  Koichi Yahagi

发明人： Masumi Kasahara ,  Koichi Yahagi

IPC分类号： H04B1/40 ,  H04B7/00

CPC分类号： H03L7/10 ,  H03L7/0891 ,  H03L7/14 ,  H03L7/18 ,  H03L7/199 ,  H04B1/00 ,  H04B1/406

摘要： A wireless communication system, which is provided with a PLL circuit having a plurality of oscillators and is capable of processing two or more transmit and receive signal different in frequency band from one another according to the switching between the oscillators, has a reset means which resets a voltage applied to each of filter capacitors lying within the PLL circuit to a predetermined voltage when the switching between the oscillators is performed.

摘要翻译： 一种无线通信系统，具有多个振荡器的PLL电路，并且能够根据振荡器之间的切换来处理两个或更多个频带彼此不同的发送和接收信号，该复位装置具有复位装置 当执行振荡器之间的切换时，施加到位于PLL电路内的每个滤波电容器的电压达到预定电压。

公开(公告)号：US20050107056A1

公开(公告)日：2005-05-19

申请号：US10495628

申请日：2002-11-13

申请人： Akira Okasaka ,  Koichi Yahagi ,  Masakazu Sakagami ,  Robert Henshaw

发明人： Akira Okasaka ,  Koichi Yahagi ,  Masakazu Sakagami ,  Robert Henshaw

IPC分类号： H03G3/30 ,  H03G3/20 ,  H04B1/06 ,  H04B7/00

CPC分类号： H03G3/3078

摘要： A communication semiconductor integrated circuit device (200) includes an amplifier circuit (330) including a plurality of variable-gain amplifiers (PGA1-PGA3) for amplifying a received signal and a plurality of filter circuits (LPF1-LPF3), the amplifiers and the filter circuits being connected to each other in a multi-stage configuration, and a last amplifier (FFGA) having a gain set regardless of a level of a received signal and a filter circuit, the last amplifier and the filter circuit are disposed at the last stage of the amplifier circuit. The amplifier circuit has an amplification factor variable according to a level of a received signal. The communication semiconductor integrated circuit device further includes a plurality of offset correction circuits (OFC1-OFC4) for correcting direct-current offset, corresponding to the variable-gain amplifiers and the last amplifiers, respectively. The offset correction circuit (OFC4) corresponding to the last amplifier conducts an offset correction at a timing different from timing for the other offset correction circuits (OFC1-OFC3).

摘要翻译： 通信半导体集成电路器件（200）包括：放大电路（330），包括用于放大接收信号的多个可变增益放大器（PGA 1 -PGA 3）和多个滤波电路（LPF 1 -LPF 3） 放大器和滤波器电路以多级配置彼此连接，并且具有增益设置的最后一个放大器（FFGA），不管接收信号的电平和滤波器电路如何，最后一个放大器和滤波器电路是 放置在放大器电路的最后阶段。 放大器电路根据接收信号的电平具有可变的放大系数。 通信半导体集成电路装置还包括用于分别对应于可变增益放大器和最后的放大器的用于校正直流偏移的多个偏移校正电路（OFC1-OFC4）。 对应于最后一个放大器的偏移校正电路（OFC4）在与其它偏移校正电路（OFC 1 -FC 3）的定时不同的定时处进行偏移校正。