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公开(公告)号:US20080230830A1
公开(公告)日:2008-09-25
申请号:US12052914
申请日:2008-03-21
申请人: Se Jun KIM , Eun Seok CHOI , Kyoung Hwan PARK , Hyun Seung YOO , Myung Shik LEE , Young Ok HONG , Jung Ryul AHN , Yong Top KIM , Kyung Pil HWANG , Won Sic WOO , Jae Young PARK , Ki Hong LEE , Ki Seon PARK , Moon Sig JOO
发明人: Se Jun KIM , Eun Seok CHOI , Kyoung Hwan PARK , Hyun Seung YOO , Myung Shik LEE , Young Ok HONG , Jung Ryul AHN , Yong Top KIM , Kyung Pil HWANG , Won Sic WOO , Jae Young PARK , Ki Hong LEE , Ki Seon PARK , Moon Sig JOO
IPC分类号: H01L29/792 , H01L21/28 , H01L21/762
CPC分类号: H01L29/513 , H01L27/105 , H01L27/11568 , H01L27/11573 , H01L29/792
摘要: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.
摘要翻译: 提供了一种非易失性存储器件及其制造方法,以防止存储在电荷陷阱层中的电荷移动到相邻存储器单元。 制造非易失性存储器件的方法包括在半导体衬底上形成第一电介质层,其中有源区由隔离层限定,在第一电介质层上形成电荷陷阱层,去除第一介电层和电荷陷阱层 在隔离层上,在包括电荷陷阱层的隔离层上形成第二电介质层,并在第二介电层上形成导电层。
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公开(公告)号:US20110204430A1
公开(公告)日:2011-08-25
申请号:US13097479
申请日:2011-04-29
申请人: Se Jun KIM , Eun Seok CHOI , Kyoung Hwan PARK , Hyun Seung YOO , Myung Shik LEE , Young Ok HONG , Jung Ryul AHN , Yong Top KIM , Kyung Pil HWANG , Won Sic WOO , Jae Young PARK , Ki Hong LEE , Ki Seon PARK , Moon Sig JOO
发明人: Se Jun KIM , Eun Seok CHOI , Kyoung Hwan PARK , Hyun Seung YOO , Myung Shik LEE , Young Ok HONG , Jung Ryul AHN , Yong Top KIM , Kyung Pil HWANG , Won Sic WOO , Jae Young PARK , Ki Hong LEE , Ki Seon PARK , Moon Sig JOO
IPC分类号: H01L29/792 , B82Y99/00
CPC分类号: H01L29/513 , H01L27/105 , H01L27/11568 , H01L27/11573 , H01L29/792
摘要: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.
摘要翻译: 提供了一种非易失性存储器件及其制造方法,以防止存储在电荷陷阱层中的电荷移动到相邻存储器单元。 制造非易失性存储器件的方法包括在半导体衬底上形成第一电介质层,其中有源区由隔离层限定,在第一电介质层上形成电荷陷阱层,去除第一介电层和电荷陷阱层 在隔离层上,在包括电荷陷阱层的隔离层上形成第二电介质层,并在第二介电层上形成导电层。
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公开(公告)号:US20120094451A1
公开(公告)日:2012-04-19
申请号:US13338048
申请日:2011-12-27
申请人: Young Ok HONG , Myung Shik LEE
发明人: Young Ok HONG , Myung Shik LEE
IPC分类号: H01L21/8239
CPC分类号: H01L29/7881 , H01L21/26586 , H01L27/115 , H01L27/11521 , H01L27/11568
摘要: A method for fabricating a non-volatile memory device with asymmetric source/drain junctions, wherein a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.
摘要翻译: 一种用于制造具有不对称源极/漏极结的非易失性存储器件的方法,其中在半导体衬底上形成栅极堆叠,并且以预定角度注入杂质离子以在半导体衬底中形成源极/漏极结。 半导体衬底的热处理在相邻栅极叠层之间形成不对称设置的源极/漏极结。
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公开(公告)号:US20140043905A1
公开(公告)日:2014-02-13
申请号:US13605243
申请日:2012-09-06
申请人: Myung Shik LEE
发明人: Myung Shik LEE
CPC分类号: G11C16/0483 , H01L21/764 , H01L21/7682 , H01L27/11521
摘要: A semiconductor memory device includes a memory cell block formed over a first memory cell region and a second memory cell region defined on a semiconductor substrate, and a voltage supply circuit configured to apply an operating voltage to gate lines of a plurality of memory cells included in the memory cell block, wherein a first air gap disposed between the gate lines in the first memory cell region has a smaller size than a second air gap disposed between the gate lines in the second memory cell region.
摘要翻译: 半导体存储器件包括形成在第一存储单元区域上的存储单元块和限定在半导体衬底上的第二存储单元区域,以及电压供给电路,被配置为向包括在多个存储单元区域中的多个存储单元的栅极线施加工作电压 存储单元块,其中设置在第一存储单元区域中的栅极线之间的第一气隙具有比设置在第二存储单元区域中的栅极线之间的第二气隙更小的尺寸。
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公开(公告)号:US20110207287A1
公开(公告)日:2011-08-25
申请号:US12954321
申请日:2010-11-24
申请人: Myung Shik LEE , Jin Gu KIM
发明人: Myung Shik LEE , Jin Gu KIM
IPC分类号: H01L21/762
CPC分类号: H01L27/11521
摘要: A method of manufacturing a nonvolatile memory device includes forming a tunnel insulating layer over a semiconductor substrate, forming a charge trap layer, including first impurity ions of a first concentration, over the tunnel insulating layer, forming a compensation layer, including second impurity ions of a second concentration, over the charge trap layer, diffusing the second impurity ions within the compensation layer toward the charge trap layer, removing the compensation layer, forming a dielectric layer on surfaces of the charge trap layer, and forming a conductive layer for a control gate on the dielectric layer.
摘要翻译: 一种制造非易失性存储器件的方法包括在半导体衬底上形成隧道绝缘层,在隧道绝缘层上形成包括第一浓度的第一杂质离子的电荷捕获层,形成补偿层,包括第二杂质离子 第二浓度,在电荷陷阱层上方,将补偿层内的第二杂质离子扩散到电荷陷阱层,去除补偿层,在电荷陷阱层的表面上形成电介质层,以及形成用于控制的导电层 电介质层上的栅极。
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