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    Multi-dimentional data randomization
    2.
    发明授权
    Multi-dimentional data randomization 有权
    多维数据随机化

    公开(公告)号：US09576624B2

    公开(公告)日：2017-02-21

    申请号：US14319021

    申请日：2014-06-30

    Applicant: Seagate Technology LLC

    Inventor： Nicholas Odin Lien ,  Ara Patapoutian ,  Jeffrey J. Pream ,  Young Pil Kim ,  David Orrin Sluiter

    IPC: G06F12/02 ,  G06F12/06 ,  G11C7/18 ,  G11C8/06 ,  G11C8/12 ,  G11C16/08

    CPC classification number: G11C7/18 ,  G11C8/06 ,  G11C8/12 ,  G11C16/08

    Abstract: The disclosed technology provides for multi-dimensional data randomization in a memory cell array using circular shifts of an initial scrambling sequence. Data addressed to a first row of a data array is randomized using the initial scrambling sequence and data addressed to each row of the memory cell array is randomized using a scrambling sequence that is equal to a circular shift of the initial sequence.

    Abstract translation: 所公开的技术使用初始加扰序列的循环移位在存储器单元阵列中提供多维数据随机化。 使用初始加扰序列对寻址到数据阵列的第一行的数据进行随机化，并且使用等于初始序列的循环移位的加扰序列将寻址到存储器单元阵列的每一行的数据随机化。

    Temperature Tracking to Manage Threshold Voltages in a Memory
    3.
    发明申请
    Temperature Tracking to Manage Threshold Voltages in a Memory 有权
    温度跟踪来管理内存中的阈值电压

    公开(公告)号：US20150310938A1

    公开(公告)日：2015-10-29

    申请号：US14261560

    申请日：2014-04-25

    Applicant: Seagate Technology LLC

    Inventor： Young Pil Kim ,  Rodney Virgil Bowman ,  Caitlin Marie Race ,  Don R. Bloyer

    IPC: G11C29/50 ,  G06F11/10

    CPC classification number: G11C29/50004 ,  G11C7/04 ,  G11C16/349 ,  G11C29/028 ,  G11C29/42

    Abstract: Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with various embodiments, a first data access operation is conducted on a memory cell and a first temperature associated with the memory cell and associated with the first data access operation is measured. A second temperature associated with the memory cell is measured. At least one operational parameter is adjusted responsive to the first and second temperatures associated with the memory cell. A second data access operation is conducted on the memory cell using the adjusted operational parameter.

    Abstract translation: 用于管理诸如闪存阵列的存储器中的数据的方法和装置。 根据各种实施例，对存储器单元执行第一数据访问操作，并且测量与存储器单元相关联并与第一数据访问操作相关联的第一温度。 测量与存储器单元相关联的第二温度。 响应于与存储器单元相关联的第一和第二温度来调整至少一个操作参数。 使用经调整的操作参数对存储器单元进行第二数据访问操作。

    Fast soft data by detecting leakage current and sensing time
    6.
    发明授权
    Fast soft data by detecting leakage current and sensing time 有权
    通过检测泄漏电流和感测时间来实现快速的软数据

    公开(公告)号：US09589655B1

    公开(公告)日：2017-03-07

    申请号：US14874257

    申请日：2015-10-02

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Young Pil Kim ,  Antoine Khoueir ,  Namoh Hwang

    IPC: G11C16/04 ,  G11C16/26 ,  G11C16/32 ,  G11C16/34 ,  G11C11/56 ,  G11C29/00

    CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/32 ,  G11C16/3418 ,  G11C16/3459 ,  G11C29/00 ,  G11C29/025 ,  G11C29/026 ,  G11C29/26 ,  G11C29/28 ,  G11C29/42 ,  G11C29/50012 ,  G11C2029/1204 ,  G11C2029/5006

    Abstract: Systems and methods for low latency acquisition of soft data from a memory cell based on a sensing time and/or a leakage current are described. In one embodiment, the systems and methods may include applying a first read voltage to a word line of a page of memory cells selected by a processor of a flash memory device for a read operation, applying a pass voltage to word lines associated with one or more different pages of memory cells of the memory block, upon applying the first read voltage sensing whether a bit line of a memory cell in the selected page conducts, measuring a side effect associated with sensing whether the bit line of the memory cell in the selected page conducts, and assigning a LLR value to the memory cell as a soft LDPC input based at least in part on the measured side effect.

    Abstract translation: 描述了基于感测时间和/或泄漏电流从存储器单元低延迟获取软数据的系统和方法。 在一个实施例中，系统和方法可以包括将第一读取电压施加到由闪存器件的处理器选择的用于读取操作的存储器单元的页面的字线，将通过电压施加到与一个或多个存储器单元相关联的字线 在应用第一读取电压检测所选择的页面中的存储器单元的位线是否导通时测量与检测所选择的存储单元中的存储器单元的位线相关联的副作用的更多不同页面的存储器块的存储单元的更多不同页面 并且至少部分地基于所测量的副作用，向存储器单元分配LLR值作为软LDPC输入。

    Charge Loss Compensation Through Augmentation of Accumulated Charge in a Memory Cell
    8.
    发明申请
    Charge Loss Compensation Through Augmentation of Accumulated Charge in a Memory Cell 有权
    通过增加存储单元中累积电荷的电荷损失补偿

    公开(公告)号：US20160293250A1

    公开(公告)日：2016-10-06

    申请号：US14675056

    申请日：2015-03-31

    Applicant: Seagate Technology LLC

    Inventor： Wei Wang ,  Antoine Khoueir ,  Young Pil Kim

    IPC: G11C11/56

    CPC classification number: G11C13/0033 ,  G06F11/1068 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/107 ,  G11C16/14 ,  G11C16/3418 ,  G11C16/3431 ,  G11C2211/5621

    Abstract: Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a block of solid-state non-volatile memory cells are each programmed to an associated programmed state responsive to a respective amount of accumulated charge. A charge loss compensation circuit adds a relatively small amount of additional charge to the respective amount of accumulated charge in each of the memory cells to maintain the associated programmed states of the cells.

    Abstract translation: 用于管理诸如闪存阵列的存储器中的数据的方法和装置。 根据一些实施例，每个固态非易失性存储器单元的块都被编程为响应相应的累积电荷量的相关编程状态。 电荷损失补偿电路将相对少量的附加电荷添加到每个存储单元中的累积电荷的相应量，以维持单元的相关编程状态。

    Temperature tracking to manage threshold voltages in a memory
    9.
    发明授权
    Temperature tracking to manage threshold voltages in a memory 有权
    温度跟踪来管理存储器中的阈值电压

    公开(公告)号：US09330790B2

    公开(公告)日：2016-05-03

    申请号：US14261560

    申请日：2014-04-25

    Applicant: Seagate Technology LLC

    Inventor： Young Pil Kim ,  Rodney Virgil Bowman ,  Caitlin Marie Race ,  Don R. Bloyer

    IPC: G11C16/04 ,  G11C29/50 ,  G11C7/04 ,  G11C16/34 ,  G11C29/02 ,  G11C29/42

    CPC classification number: G11C29/50004 ,  G11C7/04 ,  G11C16/349 ,  G11C29/028 ,  G11C29/42

    Abstract: Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with various embodiments, a first data access operation is conducted on a memory cell and a first temperature associated with the memory cell and associated with the first data access operation is measured. A second temperature associated with the memory cell is measured. At least one operational parameter is adjusted responsive to the first and second temperatures associated with the memory cell. A second data access operation is conducted on the memory cell using the adjusted operational parameter.

    Abstract translation: 用于管理诸如闪存阵列的存储器中的数据的方法和装置。 根据各种实施例，对存储器单元执行第一数据访问操作，并且测量与存储器单元相关联并与第一数据访问操作相关联的第一温度。 测量与存储器单元相关联的第二温度。 响应于与存储器单元相关联的第一和第二温度来调整至少一个操作参数。 使用经调整的操作参数对存储器单元进行第二数据访问操作。

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