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公开(公告)号:US12266398B2
公开(公告)日:2025-04-01
申请号:US17337552
申请日:2021-06-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tomoaki Atsumi , Kiyoshi Kato , Shuhei Maeda
IPC: G11C11/40 , G11C11/4094 , H01L29/786 , H10B12/00
Abstract: A semiconductor device whose operating speed is increased is provided. The semiconductor device includes a write word line, a read word line, a write bit line, a read bit line, a first wiring, and a memory cell. The memory cell includes three transistors of a single conductivity type and a capacitor. Gates of the three transistors are electrically connected to the write word line, a first terminal of the capacitor, and the read word line, respectively. A second terminal of the capacitor is electrically connected to the read bit line. A source and a drain of one transistor are electrically connected to the write bit line and the gate of another transistor, respectively. Two of the three transistors are electrically connected in series between the read bit line and the first wiring. A channel formation region of each of the three transistors includes, for example, a metal oxide layer.
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公开(公告)号:US12205622B2
公开(公告)日:2025-01-21
申请号:US18235995
申请日:2023-08-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC: H01L27/12 , G11C11/405 , G11C16/04 , H01L27/118 , H01L29/16 , H01L29/24 , H01L29/786 , H10B41/20 , H10B41/70 , H10B69/00 , H01L21/822 , H01L27/06 , H01L29/78 , H10B12/00
Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
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公开(公告)号:US12199122B2
公开(公告)日:2025-01-14
申请号:US18105005
申请日:2023-02-02
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Tatsuya Onuki , Kiyoshi Kato , Takanori Matsuzaki , Hajime Kimura , Shunpei Yamazaki
IPC: H01L27/146 , H01L21/822 , H01L27/12 , H01L29/786 , H04N25/771 , H04N25/772 , H10B12/00
Abstract: An imaging device which has a stacked-layer structure and can be manufactured easily is provided. The imaging device includes a signal processing circuit, a memory device, and an image sensor. The imaging device has a stacked-layer structure in which the memory device is provided above the signal processing circuit, and the image sensor is provided above the memory device. The signal processing circuit includes a transistor formed on a first semiconductor substrate, the memory device includes a transistor including a metal oxide in a channel formation region, and the image sensor includes a transistor formed on a second semiconductor substrate.
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公开(公告)号:US12193244B2
公开(公告)日:2025-01-07
申请号:US17891248
申请日:2022-08-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yutaka Shionoiri , Hiroyuki Miyake , Kiyoshi Kato
Abstract: It is an object to provide a memory device whose power consumption can be suppressed and a semiconductor device including the memory device. As a switching element for holding electric charge accumulated in a transistor which functions as a memory element, a transistor including an oxide semiconductor film as an active layer is provided for each memory cell in the memory device. The transistor which is used as a memory element has a first gate electrode, a second gate electrode, a semiconductor film located between the first gate electrode and the second gate electrode, a first insulating film located between the first gate electrode and the semiconductor film, a second insulating film located between the second gate electrode and the semiconductor film, and a source electrode and a drain electrode in contact with the semiconductor film.
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公开(公告)号:US20240389295A1
公开(公告)日:2024-11-21
申请号:US18785940
申请日:2024-07-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hajime Kimura , Takayuki Ikeda , Kiyoshi Kato , Yuta Endo , Junpei Sugao
IPC: H10B12/00 , G11C5/02 , G11C11/403 , G11C11/409 , H01L29/24
Abstract: A semiconductor device with a large storage capacity per unit area is provided.
A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.-
公开(公告)号:US11943929B2
公开(公告)日:2024-03-26
申请号:US18129120
申请日:2023-03-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hajime Kimura , Takanori Matsuzaki , Kiyoshi Kato , Satoru Okamoto
CPC classification number: H10B43/27 , H10B43/10 , H10B43/35 , H10B43/40 , H10B43/50 , H01L29/24 , H01L29/513
Abstract: A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
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公开(公告)号:US11676975B2
公开(公告)日:2023-06-13
申请号:US16104397
申请日:2018-08-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC: H01L27/12 , H01L21/84 , H01L27/108 , H01L27/11 , H01L27/11517 , H01L27/11521 , H01L27/1156 , H01L27/118 , H01L29/786 , H01L29/24 , G11C16/04 , G11C16/26
CPC classification number: H01L27/1255 , H01L21/84 , H01L27/108 , H01L27/10805 , H01L27/10873 , H01L27/11 , H01L27/1108 , H01L27/1156 , H01L27/11517 , H01L27/11521 , H01L27/11803 , H01L27/1225 , H01L29/24 , H01L29/7869 , G11C16/0433 , G11C16/26
Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
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公开(公告)号:US11574945B2
公开(公告)日:2023-02-07
申请号:US16763024
申请日:2018-11-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Tatsuya Onuki , Kiyoshi Kato , Takanori Matsuzaki , Hajime Kimura , Shunpei Yamazaki
IPC: H01L27/12 , H01L27/146 , H01L27/105 , H01L29/786 , H04N5/3745
Abstract: An imaging device which has a stacked-layer structure and can be manufactured easily is provided. The imaging device includes a signal processing circuit, a memory device, and an image sensor. The imaging device has a stacked-layer structure in which the memory device is provided above the signal processing circuit, and the image sensor is provided above the memory device. The signal processing circuit includes a transistor formed on a first semiconductor substrate, the memory device includes a transistor including a metal oxide in a channel formation region, and the image sensor includes a transistor formed on a second semiconductor substrate.
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公开(公告)号:US11456296B2
公开(公告)日:2022-09-27
申请号:US16779774
申请日:2020-02-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC: H01L29/78 , H01L27/105 , H01L27/11551 , H01L27/1156 , H01L27/12 , H01L27/108 , H01L29/24 , H01L29/786 , G11C13/00 , H01L27/11 , H01L49/02
Abstract: An object of one embodiment of the present invention is to provide a semiconductor device with a novel structure in which stored data can be stored even when power is not supplied in a data storing time and there is no limitation on the number of times of writing. The semiconductor device includes a first transistor which includes a first channel formation region using a semiconductor material other than an oxide semiconductor, a second transistor which includes a second channel formation region using an oxide semiconductor material, and a capacitor. One of a second source electrode and a second drain electrode of the second transistor is electrically connected to one electrode of the capacitor.
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公开(公告)号:US11195561B2
公开(公告)日:2021-12-07
申请号:US16764955
申请日:2018-11-30
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Tomoaki Atsumi , Kiyoshi Kato , Tatsuya Onuki , Shunpei Yamazaki
IPC: G11C7/04 , G11C5/04 , G11C11/4074 , H01L27/108 , H01L27/12 , H01L29/221 , G11C5/14
Abstract: A semiconductor device with a high on-state current and high operating speed is provided. The semiconductor device includes a transistor and a first circuit. The transistor includes a first gate and a second gate, and the first gate and the second gate include a region where they overlap each other with a semiconductor layer therebetween. The first circuit includes a temperature sensor and a voltage control circuit. The temperature sensor has a function of obtaining temperature information and outputting the temperature information to the voltage control circuit. The voltage control circuit has a function of converting the temperature information into a control voltage. The first circuit applies the control voltage to the second gate.
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