公开(公告)号：US20220181482A1

公开(公告)日：2022-06-09

申请号：US17677791

申请日：2022-02-22

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Haiyang ZHANG ,  Bo SU

IPC分类号： H01L29/78 ,  H01L21/3065 ,  H01L21/3213 ,  H01L29/66

摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, having a plurality of fins on a surface of the substrate; a gate structure across the plurality of fins. The gate structure is located on a portion of a top surface and sidewall surfaces of the plurality of fins. The gate structure includes a first region and a second region on the first region. A bottom boundary of the second region is higher than the top surface of the plurality of fins. A size of the first region in an extending direction of the plurality of fins is smaller than a size of the second region in the extending direction of the plurality of fins.

公开(公告)号：US20210090890A1

公开(公告)日：2021-03-25

申请号：US17023940

申请日：2020-09-17

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Qian Jiang ZHANG ,  Bo SU ,  Tao DOU ,  Lin Lin SUN

IPC分类号： H01L21/033

摘要： A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes providing a to-be-etched layer; forming an initial mask layer over the to-be-etched layer; forming a patterned structure, on the initial mask layer and exposing a portion of the initial mask layer; forming a barrier layer on a sidewall surface of the patterned structure; using the patterned structure and the barrier layer as a mask, performing an ion doping process on the initial mask layer to form a doped region and an un-doped region between doped regions in the initial mask layer; removing the patterned structure and the barrier layer; and forming a mask layer on a top surface of the to-be-etched layer by removing the un-doped region. The mask layer includes a first opening exposing the top surface of the to-be-etched layer.

公开(公告)号：US20210020442A1

公开(公告)日：2021-01-21

申请号：US16929809

申请日：2020-07-15

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Xiamei TANG ,  Wei SHI ,  Tao DOU ,  Bo SU ,  Youcun HU

IPC分类号： H01L21/033

摘要： A method of forming a semiconductor structure includes providing a to-be-etched layer, forming a core layer over the to-be-etched layer, the core layer including a first trench extending along a first direction, forming a sidewall spacer layer on a top surface of the core layer and on sidewalls and a bottom surface of the first trench, forming a block cut structure in the first trench after forming the sidewall spacer layer, and after forming the block cut structure, etching back the sidewall spacer layer until exposing the top surface of the core layer, thereby leaving a sidewall spacer on the sidewalls of the first trench. The block cut structure extends through the first trench along a second direction. The second direction and the first direction are different. The block cut structure includes a first block-cut layer and a second block-cut layer.

公开(公告)号：US20200343100A1

公开(公告)日：2020-10-29

申请号：US16855059

申请日：2020-04-22

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Linlin SUN ,  Bo SU

IPC分类号： H01L21/311

摘要： A semiconductor device and its fabrication method are provided. The method includes forming a core layer on a first region of a base substrate layer; forming sidewall spacer layers on sidewalls of two sides of the core layer along a first direction; forming a filling layer on a second region between adjacent sidewall spacer layers which are arranged along the first direction; forming a first dividing trench in the filling layer on the second region to divide the filling layer along a second direction, where sidewalls of the first dividing trench, arranged along the first direction, expose corresponding sidewall spacer layers; forming a second dividing trench in the core layer to divide the core layer along the second direction; forming a second dividing layer in the second dividing trench when forming a first dividing layer in the first dividing trench; and removing the filling layer and the core layer.

公开(公告)号：US20230100058A1

公开(公告)日：2023-03-30

申请号：US17955955

申请日：2022-09-29

申请人： Semiconductor Manufacturing International (Beijing) Corporation ,  Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Hailong YU ,  Bo SU ,  Hansu OH

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/417 ,  H01L29/775 ,  H01L21/02 ,  H01L21/311 ,  H01L21/285

摘要： Semiconductor structure and forming method thereof are provided. The forming method includes: providing a substrate; forming a plurality of initial composite layers on a portion of the substrate; forming a plurality of source and drain layers on surfaces of the plurality of channel layers exposed by a first opening and grooves by using a selective epitaxial growth process, the plurality of source and drain layers being parallel to a first direction and distributed along a second direction, the second direction being parallel to a normal direction of the substrate, and gaps being between adjacent source and drain layers; forming contact layers on surfaces of the plurality of source and drain layers and in the gaps; and forming a conductive structure on a surface of a contact layer on a source and drain layer of the plurality of source and drain layers.

公开(公告)号：US20210028007A1

公开(公告)日：2021-01-28

申请号：US16935561

申请日：2020-07-22

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Shiliang JI ,  Bo SU ,  Haiyang ZHANG

IPC分类号： H01L21/02 ,  H01L29/66 ,  H01L21/3213

摘要： A method for forming a semiconductor structure includes providing a substrate; forming a gate structure on the substrate, the gate structure extending along a first direction; removing a portion of the gate structure to form a trench in the gate structure, the trench penetrating through the gate structure along a second direction which is different form the first direction; performing a first cleaning treatment process on the trench to remove non-metal residues; and performing a second cleaning treatment process on the trench to remove metal residues.

公开(公告)号：US20200273980A1

公开(公告)日：2020-08-27

申请号：US16795864

申请日：2020-02-20

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Haiyang ZHANG ,  Bo SU

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/3065

摘要： The present disclosure provides a semiconductor device and a fabrication method. The method includes: providing a substrate having fins and forming an initial gate structure across the fins, which covers a portion of a top surface and sidewall surfaces of the fins, and includes an initial first region and an initial second region on the initial first region. A bottom boundary of the initial second region is higher than the top surface of the fins, and a size of the initial first region is larger than a size of the initial second region. A first etching process is performed on sidewalls of the initial gate structure to form a gate structure, which includes a first region formed by etching the initial first region, and a second region formed by etching the initial second region. A size of the first region is smaller than a size of the second region.

公开(公告)号：US20220199808A1

公开(公告)日：2022-06-23

申请号：US17226462

申请日：2021-04-09

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Hansu OH ,  Pengchong LI ,  Xuejie SHI ,  Yiyu CHEN ,  Bo SU

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/8234

摘要： A semiconductor structure and a method for forming the same are provided. In one form, a forming method includes: providing a base, a gate structure, a source-drain doping region, and an interlayer dielectric layer; removing the gate structure located in an isolation region to form an isolation opening and expose the top and side walls of a fin located in the isolation region; performing first ion-doping on the fin under the isolation opening to form an isolation doped region, a doping type of the isolation doped region being different from a doping type of the source-drain doping region; and filling the isolation opening with an isolation structure after the doping, the isolation structure straddling the fin of the isolation region. In embodiments and implementations of the present disclosure, the isolation doped region is formed, a doping concentration of inversion ions in the fin of the isolation region can thus be increased, and a barrier of a P-N junction formed by the source-drain doping region and the fin of the isolation region can be increased accordingly, to prevent the device from generating a conduction current in the fin of the isolation region during operation, thereby implementing isolation between the fin of the isolation region and the fin of other regions. Moreover, there is no need to perform a fin cut process. Hence the fin is made into a continuous structure, which helps prevent stress relief in the fin.

公开(公告)号：US20220199460A1

公开(公告)日：2022-06-23

申请号：US17520967

申请日：2021-11-08

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Pengchong LI ,  Xuejie SHI ,  Hansu OH ,  Bo SU

IPC分类号： H01L21/762 ,  H01L21/265 ,  H01L21/8234 ,  H01L29/66

摘要： A method for forming a semiconductor structure is provided. In one form, a method includes: providing a base, a dummy gate structure, a source-drain doped region, and an interlayer dielectric layer; removing the dummy gate structure located at an isolation region to form an isolation opening; performing first ion doping on a fin below the isolation opening, to form an isolation doped region, where a doping type of the isolation doped region is different from a doping type of the source-drain doped region; filling an isolation structure in the isolation opening; removing the remaining dummy gate structure, to form a gate opening; and forming a gate structure in the gate opening. In embodiments and implementations of the present disclosure, the isolation doped region with a doping type different from that of the source-drain doped region is formed, so that a doping concentration of opposite-type ions in the fin of the isolation region can be improved, thereby accordingly improving a potential energy barrier of a P-N junction formed by the source-drain doped region and the fin of the isolation region, to prevent a conduction current from being generated in the fin of the isolation region when a device is working, and implementing isolation between the fin in the isolation region and the fin in other regions. Moreover, there is no need to perform a fin cut process, so that the fin is a continuous structure, to prevent stress release in the fin.

公开(公告)号：US20210134595A1

公开(公告)日：2021-05-06

申请号：US17029255

申请日：2020-09-23

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Bo SU ,  Shiliang JI ,  Erhu ZHENG ,  Yan WANG ,  Haiyang ZHANG

IPC分类号： H01L21/033 ,  H01L21/02 ,  H01L21/311 ,  H01L21/308

摘要： The present disclosure provides a method for forming a semiconductor structure. The method includes providing a to-be-etched layer; forming a plurality of initial sidewall spacers on the to-be-etched layer; and performing at least one modification treatment process on the plurality of initial sidewall spacers to form a plurality of sidewall spacers. Each of the at least one modification treatment process includes modifying the plurality of initial sidewall spacers to form a transition layer on the top and sidewall surfaces of each initial sidewall spacer of the plurality of initial sidewall spacers, and then removing the transition layer.