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    MEMORY SYSTEM AND METHOD
    1.
    发明申请
    MEMORY SYSTEM AND METHOD 审中-公开
    记忆系统和方法

    公开(公告)号：US20140019833A1

    公开(公告)日：2014-01-16

    申请号：US14031620

    申请日：2013-09-19

    申请人： Seung-Jun Bae ,  Kwang-II Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

    发明人： Seung-Jun Bae ,  Kwang-II Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

    IPC分类号： G06F11/10

    CPC分类号： G06F11/1004 ,  H03M13/09

    摘要： A memory system includes a memory controller and a memory device. The memory device exchanges data through a first channel with the memory controller, exchanges a first cyclic redundancy check (CRC) code associated with the data through a second channel with the memory controller, and receives a command/address packet including a second CRC code associated with a command/address from the memory controller through a third channel.

    摘要翻译： 存储器系统包括存储器控制器和存储器件。 存储器件通过第一通道与存储器控制器交换数据，通过与存储器控制器的第二通道交换与数据相关联的第一循环冗余校验（CRC）代码，并且接收包括相关联的第二CRC码的命令/地址分组 具有来自存储器控制器的命令/地址通过第三通道。

    MEMORY SYSTEM AND METHOD
    2.
    发明申请
    MEMORY SYSTEM AND METHOD 审中-公开
    记忆系统和方法

    公开(公告)号：US20110246857A1

    公开(公告)日：2011-10-06

    申请号：US13078364

    申请日：2011-04-01

    申请人： Seung-Jun Bae ,  Kwang-Il Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

    发明人： Seung-Jun Bae ,  Kwang-Il Park ,  Young-Soo Sohn ,  Young-Hyun Jun ,  Joo-Sun Choi ,  Tae-Young Oh

    IPC分类号： H03M13/09 ,  H03M13/05 ,  G06F11/10

    CPC分类号： G06F11/1004 ,  H03M13/09

    摘要： A memory system includes a memory controller and a memory device. The memory device exchanges data through a first channel with the memory controller, exchanges a first cyclic redundancy check (CRC) code associated with the data through a second channel with the memory controller, and receives a command/address packet including a second CRC code associated with a command/address from the memory controller through a third channel.

    摘要翻译： 存储器系统包括存储器控制器和存储器件。 存储器件通过第一通道与存储器控制器交换数据，通过与存储器控制器的第二通道交换与数据相关联的第一循环冗余校验（CRC）代码，并且接收包括相关联的第二CRC码的命令/地址分组 具有来自存储器控制器的命令/地址通过第三通道。

    Data write training method
    5.
    发明授权
    Data write training method 有权
    数据写入训练方法

    公开(公告)号：US08593901B2

    公开(公告)日：2013-11-26

    申请号：US13868425

    申请日：2013-04-23

    申请人： Tae-Young Oh ,  Young-Soo Sohn ,  Seung-Jun Bae ,  Kwang-Il Park

    发明人： Tae-Young Oh ,  Young-Soo Sohn ,  Seung-Jun Bae ,  Kwang-Il Park

    IPC分类号： G11C8/00

    CPC分类号： G11C7/22 ,  G11C7/1087 ,  G11C7/1093 ,  G11C2207/2254

    摘要： Embodiments may be directed to a method of operating a semiconductor device, the method including receiving a first write training command, receiving a first write data responsive to the first write training command through a first data line, and transmitting the first write data through a second data line. Transmitting the first write data is performed without an additional training command.

    摘要翻译： 实施例可以涉及一种操作半导体器件的方法，所述方法包括接收第一写入训练命令，响应于通过第一数据线的第一写入训练命令接收第一写入数据，以及通过第二数据线发送第一写入数据 数据线。 在不附加训练命令的情况下执行发送第一写入数据。

    Data write training method and semiconductor device performing the same
    7.
    发明授权
    Data write training method and semiconductor device performing the same 有权
    数据写入训练方法和执行相同的半导体器件

    公开(公告)号：US08437216B2

    公开(公告)日：2013-05-07

    申请号：US13270710

    申请日：2011-10-11

    申请人： Tae-Young Oh ,  Young-Soo Sohn ,  Seung-Jun Bae ,  Kwang-Il Park

    发明人： Tae-Young Oh ,  Young-Soo Sohn ,  Seung-Jun Bae ,  Kwang-Il Park

    IPC分类号： G11C8/00

    CPC分类号： G11C7/22 ,  G11C7/1087 ,  G11C7/1093 ,  G11C2207/2254

    摘要： Embodiments may be directed to a method of operating a semiconductor device, the method including receiving a first write training command, receiving a first write data responsive to the first write training command through a first data line, and transmitting the first write data through a second data line. Transmitting the first write data is performed without an additional training command.

    摘要翻译： 实施例可以涉及一种操作半导体器件的方法，所述方法包括接收第一写入训练命令，响应于通过第一数据线的第一写入训练命令接收第一写入数据，以及通过第二数据线发送第一写入数据 数据线。 在不附加训练命令的情况下执行发送第一写入数据。

    Receiving apparatus and method thereof
    10.
    发明申请
    Receiving apparatus and method thereof 有权
    接收装置及其方法

    公开(公告)号：US20060176988A1

    公开(公告)日：2006-08-10

    申请号：US11345451

    申请日：2006-02-02

    申请人： Young-Soo Sohn ,  Seung-Jun Bae ,  Hong-Jun Park ,  Jung-Hwan Choi

    发明人： Young-Soo Sohn ,  Seung-Jun Bae ,  Hong-Jun Park ,  Jung-Hwan Choi

    IPC分类号： H04B1/10

    CPC分类号： H04L25/03038 ,  H04L7/0058

    摘要： A receiving apparatus and method thereof. In an example, the receiving apparatus may include a clock generating unit generating a plurality of internal clock signals based on a received external clock signal and an equalization receiving unit receiving the plurality of internal clock signals and an input signal. The equalization receiving unit may determine an offset value and an equalization coefficient based on the plurality of internal clock signals and the input signal. The equalization receiving unit may adjust a received data signal based on the determined offset value and equalization coefficient.

    摘要翻译： 一种接收装置及其方法。 在一个示例中，接收装置可以包括基于接收的外部时钟信号产生多个内部时钟信号的时钟产生单元和接收多个内部时钟信号的均衡接收单元和输入信号。 均衡接收单元可以基于多个内部时钟信号和输入信号确定偏移值和均衡系数。 均衡接收单元可以基于确定的偏移值和均衡系数来调整接收的数据信号。