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1.发明授权公开(公告)号：US07904846B2
公开(公告)日：2011-03-08
申请号：US11831745
申请日：2007-07-31
CPC分类号： G06F17/5022
摘要： A computer is programmed to automatically generate in memory, goals for functional verification of a design of a circuit by use of constraints that are specified in the normal manner. Specifically, a predetermined set of rules are automatically applied to the constraints, on random values for signals to be input to the circuit during simulation of the design. Application of the rules identifies one or more templates of goal(s) to be met. The computer is programmed to automatically use constraint(s) and template(s) to instantiate goal(s) in memory. Each goal identifies a signal to be input to the circuit, and defines a counter for a value of the signal. The goals are used in the normal manner, i.e. used to measure coverage of functional verification during simulation of the design of the circuit.
摘要翻译： 计算机被编程为在存储器中自动生成，通过使用以正常方式指定的约束来对电路设计进行功能验证的目标。 具体而言，在设计仿真期间，将规定的规则集合自动应用于要输入到电路的信号的随机值的约束。 规则的应用确定要满足的目标的一个或多个模板。 计算机被编程为自动使用约束和模板来实例化存储器中的目标。 每个目标识别要输入到电路的信号，并且定义用于信号值的计数器。 目标以正常方式使用，即用于在模拟电路设计期间测量功能验证的覆盖范围。
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2.发明授权Method for automatic maximization of coverage in constrained stimulus driven simulation 有权在受限刺激驱动模拟中自动最大化覆盖的方法公开(公告)号：US07617468B2
公开(公告)日：2009-11-10
申请号：US11831673
申请日：2007-07-31
CPC分类号： G01R31/31835 , G06F17/5081
摘要： A computer increases coverage in simulation of a design of a circuit by processing goals for coverage differently depending on whether or not the goals are on input signals of the circuit. Specifically, goals on input signals are used to automatically formulate constraints (“directly-derived constraints”) on values of input signals in test vectors. Goals on non-input signals (e.g. internal/output signals) are used with correlations to automatically formulate more additional constraints (“correlation-derived constraints”), by use of goals on non-input signals. The correlations indicate which non-input signals are associated with which input signals. The correlations are received from, for example, a human designer of the circuit. Depending on the embodiment, one or more of the automatically derived constraints are used with human-supplied constraints, to generate test vectors e.g. using a constraints solver, such as a satisfiability (SAT) engine. The test vectors are supplied to a simulator for functional verification.
摘要翻译： 计算机通过根据目标是否在电路的输入信号上不同地处理覆盖目标而增加对电路设计的模拟的覆盖。 具体来说，输入信号的目标被用于自动地对测试矢量中的输入信号的值自动制定约束（“直接导出约束”）。 使用非输入信号（例如内部/输出信号）的目标，其相关性通过使用非输入信号上的目标来自动制定更多附加约束（“相关来源约束”）。 相关性指示哪些输入信号与哪个输入信号相关联。 相关性从例如电路的人类设计者接收。 根据实施例，一个或多个自动导出的约束与人类提供的约束一起使用，以生成测试向量，例如， 使用约束求解器，如可满足性（SAT）引擎。 将测试向量提供给用于功能验证的模拟器。
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3.发明申请Method For Automatic Maximization of Coverage in Constrained Stimulus Driven Simulation 有权在约束激励驱动模拟中自动最大化覆盖的方法公开(公告)号：US20090037858A1
公开(公告)日：2009-02-05
申请号：US11831673
申请日：2007-07-31
IPC分类号： G06F17/50
CPC分类号： G01R31/31835 , G06F17/5081
摘要： A computer increases coverage in simulation of a design of a circuit by processing goals for coverage differently depending on whether or not the goals are on input signals of the circuit. Specifically, goals on input signals are used to automatically formulate constraints (“directly-derived constraints”) on values of input signals in test vectors. Goals on non-input signals (e.g. internal/output signals) are used with correlations to automatically formulate more additional constraints (“correlation-derived constraints”), by use of goals on non-input signals. The correlations indicate which non-input signals are associated with which input signals. The correlations are received from, for example, a human designer of the circuit. Depending on the embodiment, one or more of the automatically derived constraints are used with human-supplied constraints, to generate test vectors e.g. using a constraints solver, such as a satisfiability (SAT) engine. The test vectors are supplied to a simulator for functional verification.
摘要翻译： 计算机通过根据目标是否在电路的输入信号上不同地处理覆盖目标而增加对电路设计的模拟的覆盖。 具体来说，输入信号的目标被用于自动地对测试矢量中的输入信号的值自动制定约束（“直接导出约束”）。 使用非输入信号（例如内部/输出信号）的目标，其相关性通过使用非输入信号上的目标来自动制定更多附加约束（“相关来源约束”）。 相关性指示哪些输入信号与哪个输入信号相关联。 相关性从例如电路的人类设计者接收。 根据实施例，一个或多个自动导出的约束与人类提供的约束一起使用，以生成测试向量，例如， 使用约束求解器，如可满足性（SAT）引擎。 将测试向量提供给用于功能验证的模拟器。
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4.发明申请公开(公告)号：US20090037859A1
公开(公告)日：2009-02-05
申请号：US11831745
申请日：2007-07-31
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： A computer is programmed to automatically generate in memory, goals for functional verification of a design of a circuit by use of constraints that are specified in the normal manner. Specifically, a predetermined set of rules are automatically applied to the constraints, on random values for signals to be input to the circuit during simulation of the design. Application of the rules identifies one or more templates of goal(s) to be met. The computer is programmed to automatically use constraint(s) and template(s) to instantiate goal(s) in memory. Each goal identifies a signal to be input to the circuit, and defines a counter for a value of the signal. The goals are used in the normal manner, i.e. used to measure coverage of functional verification during simulation of the design of the circuit.
摘要翻译： 计算机被编程为在存储器中自动生成，通过使用以正常方式指定的约束来对电路设计进行功能验证的目标。 具体而言，在设计仿真期间，将规定的规则集合自动应用于要输入到电路的信号的随机值的约束。 规则的应用确定要满足的目标的一个或多个模板。 计算机被编程为自动使用约束和模板来实例化存储器中的目标。 每个目标识别要输入到电路的信号，并且定义用于信号值的计数器。 目标以正常方式使用，即用于在模拟电路设计期间测量功能验证的覆盖范围。
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