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1.发明申请METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING EMBEDDED STRAIN-INDUCING PATTERN 有权形成具有嵌入式应变诱导图案的半导体器件的方法公开(公告)号：US20150024565A1
公开(公告)日：2015-01-22
申请号：US14508250
申请日：2014-10-07
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/02587 , H01L21/02636 , H01L21/02658 , H01L29/045 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets.
摘要翻译： 半导体器件可以包括有源区，其具有提供相对的源极和漏极区之间的沟道区的鳍部。 栅电极可以跨越在相对的源极和漏极区域之间的沟道区域上，并且第一和第二应变诱导结构可以在栅电极的相对侧上，并且可以被配置为在沟道区域上引起应变，其中第一和 第二应变诱导结构，其包括具有一对{111}晶体取向小面的相应的相对侧。
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2.发明申请SEMICONDUCTOR DEVICE HAVING EMBEDDED STRAIN-INDUCING PATTERN AND METHOD OF FORMING THE SAME 有权具有嵌入式应变诱导图案的半导体器件及其形成方法公开(公告)号：US20130341631A1
公开(公告)日：2013-12-26
申请号：US13826633
申请日：2013-03-14
IPC分类号： H01L29/04
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/02587 , H01L21/02636 , H01L21/02658 , H01L29/045 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets.
摘要翻译： 半导体器件可以包括有源区，其具有提供相对的源极和漏极区之间的沟道区的鳍部。 栅电极可以跨越在相对的源极和漏极区域之间的沟道区域上，并且第一和第二应变诱导结构可以在栅电极的相对侧上，并且可以被配置为在沟道区域上引起应变，其中第一和 第二应变诱导结构，其包括具有一对{111}晶体取向小面的相应的相对侧。
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3.发明授权Semiconductor device having embedded strain-inducing pattern and method of forming the same 有权具有嵌入式应变诱发图案的半导体器件及其形成方法公开(公告)号：US08884298B2
公开(公告)日：2014-11-11
申请号：US13826633
申请日：2013-03-14
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/02587 , H01L21/02636 , H01L21/02658 , H01L29/045 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets.
摘要翻译： 半导体器件可以包括有源区，其具有提供相对的源极和漏极区之间的沟道区的鳍部。 栅电极可以跨越在相对的源极和漏极区域之间的沟道区域上，并且第一和第二应变诱导结构可以在栅电极的相对侧上，并且可以被配置为在沟道区域上引起应变，其中第一和 第二应变诱导结构，其包括具有一对{111}晶体取向小面的相应的相对侧。
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公开(公告)号：US09240481B2
公开(公告)日：2016-01-19
申请号：US14596291
申请日：2015-01-14
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/02587 , H01L21/02636 , H01L21/02658 , H01L29/045 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets.
摘要翻译： 半导体器件可以包括有源区，其具有提供相对的源极和漏极区之间的沟道区的鳍部。 栅电极可以跨越在相对的源极和漏极区域之间的沟道区域上，并且第一和第二应变诱导结构可以在栅电极的相对侧上，并且可以被配置为在沟道区域上引起应变，其中第一和 第二应变诱导结构，其包括具有一对{111}晶体取向小面的相应的相对侧。
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公开(公告)号：US20150123176A1
公开(公告)日：2015-05-07
申请号：US14596291
申请日：2015-01-14
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/02587 , H01L21/02636 , H01L21/02658 , H01L29/045 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets.
摘要翻译： 半导体器件可以包括有源区，其具有提供相对的源极和漏极区之间的沟道区的鳍部。 栅电极可以跨越在相对的源极和漏极区域之间的沟道区域上，并且第一和第二应变诱导结构可以在栅电极的相对侧上，并且可以被配置为在沟道区域上引起应变，其中第一和 第二应变诱导结构，其包括具有一对{111}晶体取向小面的相应的相对侧。
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6.发明授权Method of forming semiconductor device having embedded strain-inducing pattern 有权形成具有嵌入应变诱导图案的半导体器件的方法公开(公告)号：US08962435B2
公开(公告)日：2015-02-24
申请号：US14508250
申请日：2014-10-07
IPC分类号： H01L21/336 , H01L29/66 , H01L21/02
CPC分类号： H01L29/7842 , H01L21/02532 , H01L21/02587 , H01L21/02636 , H01L21/02658 , H01L29/045 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides of the gate electrode and can be configured to induce strain on the channel region, where each of the first and second strain inducing structures including a respective facing side having a pair of {111} crystallographically oriented facets.
摘要翻译： 半导体器件可以包括有源区，其具有提供相对的源极和漏极区之间的沟道区的鳍部。 栅电极可以跨越在相对的源极和漏极区域之间的沟道区域上，并且第一和第二应变诱导结构可以在栅电极的相对侧上，并且可以被配置为在沟道区域上引起应变，其中第一和 第二应变诱导结构，其包括具有一对{111}晶体取向小面的相应的相对侧。
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7.发明授权Shunt regulator having over-voltage protection circuit and semiconductor device including the same 有权具有过电压保护电路的分路稳压器和包括其的半导体器件公开(公告)号：US08461812B2
公开(公告)日：2013-06-11
申请号：US12327458
申请日：2008-12-03
申请人： Han-Su Kim , Joo-Hyun Jeong
发明人： Han-Su Kim , Joo-Hyun Jeong
IPC分类号： G05F1/613
CPC分类号： G05F1/613
摘要： A shunt regulator includes a control circuit, a bypass circuit and a protection circuit. The control circuit is coupled between a first node and a ground, and generates a gate control signal in response to a voltage of the first node and a reference voltage. The bypass circuit forms a first current path between the first node and the ground in response to the gate control signal. The protection circuit has an MOS transistor that is fully turned on in response to a current flowing through the bypass circuit, and forms a second current path between the first node and the ground. Therefore, the shunt regulator occupies a relatively small area in an integrated circuit.
摘要翻译： 并联调节器包括控制电路，旁路电路和保护电路。 控制电路耦合在第一节点和地之间，并且响应于第一节点的电压和参考电压而产生门控制信号。 旁路电路响应于门控制信号在第一节点和地之间形成第一电流路径。 保护电路具有响应于流过旁路电路的电流而完全导通的MOS晶体管，并且在第一节点和地之间形成第二电流路径。 因此，分流调节器在集成电路中占据相对较小的面积。
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公开(公告)号：US20070216510A1
公开(公告)日：2007-09-20
申请号：US11804320
申请日：2007-05-17
申请人： Joo-Hyun Jeong , Chul-Ho Chung
发明人： Joo-Hyun Jeong , Chul-Ho Chung
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F27/34 , H01F41/041 , H01F2017/0046 , H01F2017/0073 , H01L2924/0002 , H01L2924/00
摘要： An inductor pattern is formed on a substrate. A conductive pattern having a concave-convex structure is formed on the inductor pattern to increase a surface area of the inductor pattern. An insulation layer is formed on the inductor pattern. After a groove is formed such that the insulation layer is removed to expose the inductor pattern, a conductive pattern is conformally formed on the groove and the insulation layer. Thus, a surface area of the inductor pattern as well as a thickness of an inductor increases to obtain an inductor of a high quality factor.
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公开(公告)号：US07236081B2
公开(公告)日：2007-06-26
申请号：US11322753
申请日：2005-12-30
申请人： Joo-Hyun Jeong , Chul-Ho Chung
发明人： Joo-Hyun Jeong , Chul-Ho Chung
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F27/34 , H01F41/041 , H01F2017/0046 , H01F2017/0073 , H01L2924/0002 , H01L2924/00
摘要： An inductor pattern is formed on a substrate. A conductive pattern having a concave-convex structure is formed on the inductor pattern to increase a surface area of the inductor pattern. An insulation layer is formed on the inductor pattern. After a groove is formed such that the insulation layer is removed to expose the inductor pattern, a conductive pattern is conformally formed on the groove and the insulation layer. Thus, a surface area of the inductor pattern as well as a thickness of an inductor increases to obtain an inductor of a high quality factor.
摘要翻译： 在基板上形成电感图形。 在电感图案上形成具有凹凸结构的导电图案，以增加电感图案的表面积。 在电感器图案上形成绝缘层。 在形成凹槽之后，去除绝缘层以露出电感器图案，导电图案保形地形成在凹槽和绝缘层上。 因此，电感器图案的表面积以及电感器的厚度增加以获得高品质因数的电感器。
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公开(公告)号：US07405643B2
公开(公告)日：2008-07-29
申请号：US11804320
申请日：2007-05-17
申请人： Joo-Hyun Jeong , Chul-Ho Chung
发明人： Joo-Hyun Jeong , Chul-Ho Chung
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F27/34 , H01F41/041 , H01F2017/0046 , H01F2017/0073 , H01L2924/0002 , H01L2924/00
摘要： An inductor pattern is formed on a substrate. A conductive pattern having a concave-convex structure is formed on the inductor pattern to increase a surface area of the inductor pattern. An insulation layer is formed on the inductor pattern. After a groove is formed such that the insulation layer is removed to expose the inductor pattern, a conductive pattern is conformally formed on the groove and the insulation layer. Thus, a surface area of the inductor pattern as well as a thickness of an inductor increases to obtain an inductor of a high quality factor.
摘要翻译： 在基板上形成电感图形。 在电感图案上形成具有凹凸结构的导电图案，以增加电感图案的表面积。 在电感器图案上形成绝缘层。 在形成凹槽之后，去除绝缘层以露出电感器图案，导电图案保形地形成在凹槽和绝缘层上。 因此，电感器图案的表面积以及电感器的厚度增加以获得高品质因数的电感器。
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