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    Logic circuitry-implemented bus buffer
    3.
    发明授权
    Logic circuitry-implemented bus buffer 有权
    逻辑电路实现的总线缓冲器

    公开(公告)号：US06714051B2

    公开(公告)日：2004-03-30

    申请号：US10309254

    申请日：2002-12-04

    申请人： Akira Takiba ,  Masanori Kinugasa ,  Takumi Tsukazaki ,  Toru Fujii ,  Masaru Mizuta

    发明人： Akira Takiba ,  Masanori Kinugasa ,  Takumi Tsukazaki ,  Toru Fujii ,  Masaru Mizuta

    IPC分类号： H03K190175

    CPC分类号： G06F13/4027 ,  Y02D10/14 ,  Y02D10/151

    摘要： A bus buffer has a controller to generate several control signals; a first terminal via which a first-directional signal is input whereas a second-directional signal is output; a second terminal via which the first-directional signal is output whereas the second-directional signal is input; a first-directional signal processor, provided between the first and second terminals, having a first internal circuit and a first output buffer; a second-directional signal processor, provided between the second and first terminals, having a second internal circuit and a second output buffer; a first input buffer having a first input holder to disactivate the first internal circuit and the first output buffer by using at least one of the control signals; and a second input buffer having a second input holder to disactivate the second internal circuit and the second output buffer by using the at least one control signal, for holding the input to the input buffers at a certain level to decrease a current to pass these circuits, thus achieving low power consumption.

    摘要翻译： 总线缓冲器具有控制器以产生若干控制信号; 输入第一方向信号的第一终端，输出第二方向信号; 输出第一方向信号的第二端子，而输入第二方向信号; 设置在第一和第二终端之间的具有第一内部电路和第一输出缓冲器的第一方向信号处理器; 设置在第二和第一终端之间的具有第二内部电路和第二输出缓冲器的第二方向信号处理器; 第一输入缓冲器，具有通过使用至少一个控制信号来去激活第一内部电路和第一输出缓冲器的第一输入保持器; 以及具有第二输入保持器的第二输入缓冲器，用于通过使用所述至少一个控制信号去激活第二内部电路和第二输出缓冲器，以将输入保持在一定电平的输入缓冲器以减小电流以通过这些电路 ，从而实现低功耗。

    Protection circuit provided in semiconductor circuit
    4.
    发明授权
    Protection circuit provided in semiconductor circuit 失效
    半导体电路中提供的保护电路

    公开(公告)号：US06762460B2

    公开(公告)日：2004-07-13

    申请号：US09983124

    申请日：2001-10-23

    申请人： Akira Takiba ,  Masanori Kinugasa ,  Yoshimitsu Itoh ,  Masaru Mizuta

    发明人： Akira Takiba ,  Masanori Kinugasa ,  Yoshimitsu Itoh ,  Masaru Mizuta

    IPC分类号： H01L2362

    CPC分类号： H01L27/0266

    摘要： A protection circuit including a power supply terminal supplied with a power supply potential, a reference terminal supplied with a reference potential, and a first p-channel MOS transistor having a first gate, a first source, a first drain and a first back gate. The first gate, the first source and the first back gate are connected to the power supply terminal. Also included is a second p-channel MOS transistor having a second gate, a second source, a second drain and the first back gate, in which the second source of the second p-channel MOS transistor is connected to the first drain of the first p-channel MOS transistor, and the second gate and the second drain of the second p-channel MOS transistor is connected to the reference terminal. The circuit also includes a first n-channel MOS transistor having a third gate, a third source, a third drain and a second back gate, in which the third gate, in which the third source and the second back gate of the first n-channel MOS transistor are connected to the reference terminal, and including a second n-channel MOS transistor having a fourth gate, a fourth source, a fourth drain and the second back gate, in which the fourth source of the second n-channel MOS transistor are connected to the third drain of the first n-channel MOS transistor, and the fourth gate and the fourth drain of the second n-channel MOS transistor are connected to the power supply terminal.

    摘要翻译： 一种保护电路，包括供电电源的电源端子，提供有参考电位的基准端子以及具有第一栅极，第一源极，第一漏极和第一后栅极的第一p沟道MOS晶体管。 第一栅极，第一源极和第一后栅极连接到电源端子。 还包括具有第二栅极，第二源极，第二漏极和第一后栅极的第二p沟道MOS晶体管，其中第二P沟道MOS晶体管的第二源极连接到第一栅极 p沟道MOS晶体管，第二p沟道MOS晶体管的第二栅极和第二漏极连接到参考端子。 该电路还包括具有第三栅极，第三源极，第三漏极和第二后栅极的第一n沟道MOS晶体管，其中第三栅极，其中第一栅极，第三漏极和第二栅极的第三源极和第二反向栅极， 沟道MOS晶体管连接到参考端，并且包括具有第四栅极，第四源极，第四漏极和第二后栅极的第二n沟道MOS晶体管，其中第二n沟道MOS晶体管的第四源极 连接到第一n沟道MOS晶体管的第三漏极，第二n沟道MOS晶体管的第四栅极和第四漏极连接到电源端子。

    Temperature detector circuit having function for restricting occurrence of output error caused by dispersion in element manufacture
    5.
    发明授权
    Temperature detector circuit having function for restricting occurrence of output error caused by dispersion in element manufacture 失效
    温度检测电路具有限制元件制造中色散引起的输出误差的发生的功能

    公开(公告)号：US06337603B1

    公开(公告)日：2002-01-08

    申请号：US09606016

    申请日：2000-06-29

    申请人： Masanori Kinugasa ,  Yoshimitsu Itoh ,  Masaru Mizuta ,  Akira Takiba ,  Shinji Inada

    发明人： Masanori Kinugasa ,  Yoshimitsu Itoh ,  Masaru Mizuta ,  Akira Takiba ,  Shinji Inada

    IPC分类号： H03B504

    CPC分类号： H03B5/04 ,  H03B5/36

    摘要： A temperature detector circuit for converting a forward drop voltage of a diode to digital data by means of an AD converter is provided. In order to restrict an occurrence of an output error caused by dispersion in diode manufacture, correction data according to digital data obtained by the AD converter is stored in advance in a storage circuit under a known arbitrary temperature condition, and subtraction is performed between digital data obtained by the AD converter under an unknown temperature condition and correction data read from a storage circuit, thereby to perform correction.

    摘要翻译： 提供一种用于通过AD转换器将二极管的正向压降电压转换为数字数据的温度检测器电路。 为了限制二极管制造中由色散引起的输出误差的发生，根据AD转换器获得的数字数据的校正数据预先存储在已知的任意温度条件下的存储电路中，并且在数字数据 在未知温度条件下由AD转换器获得的校正数据和从存储电路读取的校正数据，从而进行校正。

    BUS SWITCH WITH LEVEL SHIFTING
    6.
    发明申请
    BUS SWITCH WITH LEVEL SHIFTING 失效
    总线开关水平移位

    公开(公告)号：US20080028121A1

    公开(公告)日：2008-01-31

    申请号：US11778275

    申请日：2007-07-16

    申请人： Akira Takiba ,  Masaru Mizuta

    发明人： Akira Takiba ,  Masaru Mizuta

    IPC分类号： G06F13/36

    CPC分类号： G06F13/4072

    摘要： A bus switch with level shifting may include a first terminal configured to receive and output a first power supply voltage higher than a reference voltage, a second terminal configured to receive and output a second power supply voltage higher than the first power supply voltage, an output control terminal to which a control signal for controlling a switching between an output permitted state and an output prohibited state is inputted, a first switching element provided between the first terminal and the second terminal and having a gate, a gate control circuit to which signals are inputted from the output control terminal and the second terminal, which supplies gate voltage to the gate of the first switching element, and which controls the first switching element to be conducting or to be non-conducting, and a second switching device provided between a power source of the second power supply voltage and the second terminal, and configured to switch between conducting and non-conducting in accordance with the electric potential of the second terminal

    摘要翻译： 具有电平移位的总线开关可以包括被配置为接收和输出高于参考电压的第一电源电压的第一端子，被配置为接收和输出高于第一电源电压的第二电源电压的第二端子， 输入用于控制输出允许状态和输出禁止状态之间的切换的控制信号的控制端子，设置在第一端子和第二端子之间并具有栅极的第一开关元件，栅极控制电路，信号为 从输出控制端子和第二端子输入，该第二端子将栅极电压提供给第一开关元件的栅极，并且控制第一开关元件导通或不导通;以及第二开关器件，其设置在功率 第二电源电压源和第二端子，并被配置为在导通和非导通之间切换 根据第二终端的电位

    Bus switch with level shifting
    7.
    发明授权
    Bus switch with level shifting 失效
    总线开关带电平转换

    公开(公告)号：US07652518B2

    公开(公告)日：2010-01-26

    申请号：US11778275

    申请日：2007-07-16

    申请人： Akira Takiba ,  Masaru Mizuta

    发明人： Akira Takiba ,  Masaru Mizuta

    IPC分类号： H03L5/00

    CPC分类号： G06F13/4072

    摘要： A bus switch with level shifting may include a first terminal configured to receive and output a first power supply voltage higher than a reference voltage, a second terminal configured to receive and output a second power supply voltage higher than the first power supply voltage, an output control terminal to which a control signal for controlling a switching between an output permitted state and an output prohibited state is inputted, a first switching element provided between the first terminal and the second terminal and having a gate, a gate control circuit to which signals are inputted from the output control terminal and the second terminal, which supplies gate voltage to the gate of the first switching element, and which controls the first switching element to be conducting or to be non-conducting, and a second switching device provided between a power source of the second power supply voltage and the second terminal, and configured to switch between conducting and non-conducting in accordance with the electric potential of the second terminal.

    摘要翻译： 具有电平移位的总线开关可以包括被配置为接收和输出高于参考电压的第一电源电压的第一端子，被配置为接收和输出高于第一电源电压的第二电源电压的第二端子， 输入用于控制输出允许状态和输出禁止状态之间的切换的控制信号的控制端子，设置在第一端子和第二端子之间并具有栅极的第一开关元件，栅极控制电路，信号为 从输出控制端子和第二端子输入，该第二端子将栅极电压提供给第一开关元件的栅极，并且控制第一开关元件导通或不导通;以及第二开关器件，其设置在功率 第二电源电压源和第二端子，并被配置为在导通和非导通之间切换 根据第二终端的电位。

    Temperature sensor circuit having trimming function
    8.
    发明授权
    Temperature sensor circuit having trimming function 失效
    温度传感器电路具有微调功能

    公开(公告)号：US06674185B2

    公开(公告)日：2004-01-06

    申请号：US10286294

    申请日：2002-11-04

    申请人： Masaru Mizuta

    发明人： Masaru Mizuta

    IPC分类号： G01K701

    CPC分类号： G01K15/00

    摘要： A temperature sensor circuit includes a temperature detecting circuit, a preset value storing circuit, and a current supplying circuit. The temperature detecting circuit is configured to generate a first temperature voltage in accordance with an ambient temperature and a current. The preset value storing circuit stores a second temperature voltage preset for a predetermined ambient temperature as a digital value. The current supplying circuit supplies the current to the temperature detecting circuit. The current supplying circuit supplies the current such that the first temperature voltage generated by the temperature detecting circuit at the predetermined ambient temperature is equal to the second temperature voltage.

    摘要翻译： 温度传感器电路包括温度检测电路，预设值存储电路和电流供给电路。 温度检测电路被配置为根据环境温度和电流产生第一温度电压。 预设值存储电路将预定的环境温度的第二温度电压存储为数字值。 电流供给电路将电流供给温度检测电路。 电流供给电路提供电流，使得温度检测电路在预定环境温度下产生的第一温度电压等于第二温度电压。