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1.发明授权Circuit board design aiding apparatus, design aiding method, and storage medium storing design aiding program 有权电路板设计辅助设备，设计辅助方法和存储设备辅助程序存储介质公开(公告)号：US06629302B2
公开(公告)日：2003-09-30
申请号：US09746886
申请日：2000-12-22
申请人： Shinji Miura , Yukihiro Fukumoto , Hirokazu Uemura , Yoshiyuki Saito , Hiroshi Ikeda , Takeshi Nakayama , Osamu Shibata , Shinichi Tanimoto
发明人： Shinji Miura , Yukihiro Fukumoto , Hirokazu Uemura , Yoshiyuki Saito , Hiroshi Ikeda , Takeshi Nakayama , Osamu Shibata , Shinichi Tanimoto
IPC分类号： G06F945
CPC分类号： G06F17/5068
摘要： A design aiding apparatus and a method, and a storage medium storing a design aiding program enable the efficient layout design of components in a multilayer wiring board formed by laminating a plurality of wiring layers. The design aiding apparatus includes (a) a first acquiring unit for acquiring information showing a first location in a lamination direction of the wiring layers, (b) a second acquiring unit for acquiring information showing a second location on a two-dimensional plane that is orthogonal to the lamination direction, and (c) a placement unit for generating information showing a space to be occupied when the component is placed in such a manner that a placement reference point of the component coincides with the second location that is on the two-dimensional plane including the first location. According to the above construction, the present invention is capable of aiding layout design of components in the wiring board.
摘要翻译： 设计辅助装置和方法以及存储设计辅助程序的存储介质使得能够通过层叠多个布线层而形成的多层布线板中的部件的有效布局设计。 设计辅助装置包括：（a）第一获取单元，用于获取表示布线层的层叠方向上的第一位置的信息，（b）第二获取单元，用于获取表示二维平面上的第二位置的信息， 与所述层叠方向正交，以及（c）放置单元，用于产生表示当所述部件以所述部件的放置基准点与所述第二位置的所述第二位置一致的方式配置时要占据的空间的信息， 包括第一位置的三维平面。 根据上述结构，本发明能够帮助布线板中部件的布局设计。
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2.发明授权公开(公告)号：US06901343B2
公开(公告)日：2005-05-31
申请号：US10029571
申请日：2001-12-20
申请人： Eiji Takahashi , Yukihiro Fukumoto , Yoshiyuki Saito , Osamu Shibata , Shinichi Tanimoto , Takeshi Nakayama
发明人： Eiji Takahashi , Yukihiro Fukumoto , Yoshiyuki Saito , Osamu Shibata , Shinichi Tanimoto , Takeshi Nakayama
CPC分类号： G06F17/5068 , H05K1/0275 , H05K1/0298 , H05K1/114 , H05K2201/09627 , H05K2201/09772 , H05K2201/10151
摘要： A signal line, being in a six-layer board and connecting terminal 102 of component 101 with terminal 115 of component 114, requires tamper-resistance. The signal line is composed of foil 103 on an outside layer, a via 104, foil 111 on the third layer, via 105, foil 112 on the fourth layer, via 106, and foil 113 on the sixth layer. Portions of the signal line that exist on outside layers are all hidden under circuit components. Foil 103 and an end of via 104 are placed under component 101 on first layer 116, an end of via 105 is placed under component 107 on layer 116, an end of via 106 is placed under component 108 on layer 116, the other end of via 104 is placed under component 109 on sixth layer 121, the other end of via 105 is placed under component 110 on layer 121, and foil 113 and the other end of via 106 are placed under component 114 on layer 121.
摘要翻译： 在组件101的六层板和连接端子102与元件114的端子115之间的信号线需要防篡改。 信号线由外层的箔103，通孔104，第三层上的箔111，通孔105，第四层上的箔112，第106层和第六层上的箔113组成。 存在于外层的信号线部分都隐藏在电路元件下面。 箔103和通孔104的末端放置在第一层116上的部件101下方，通孔105的端部放置在层116上的部件107的下方，通孔106的端部放置在层116上的部件108的下方，另一端 通孔104被放置在第六层121上的部件109的下方，通孔105的另一端被放置在层121上的部件110下方，并且箔113和通孔106的另一端放置在层121上的部件114下方。
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公开(公告)号：US07120885B2
公开(公告)日：2006-10-10
申请号：US10620535
申请日：2003-07-16
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , H05K1/0231 , H05K3/0005
摘要： A CAD apparatus includes a determining unit for determining a component order in ascending order of impedance of components for passive components amongst components to be placed on a printed wiring board. The CAD apparatus places each passive component in the determined component order in a vicinity of power pins of non-passive components that are already placed.
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4.发明授权Computer aided design apparatus for aiding design of a printed wiring board to effectively reduce noise 失效计算机辅助设计设备，用于协助设计印刷电路板，有效降低噪音公开(公告)号：US06631509B2
公开(公告)日：2003-10-07
申请号：US09771843
申请日：2001-01-29
IPC分类号： G06F1750
CPC分类号： G06F17/5068 , H05K1/0231 , H05K3/0005
摘要： A CAD apparatus includes a determining unit for determining a component order in ascending order of impedance of components for passive components amongst components to be placed on a printed wiring board. The CAD apparatus places each passive component in the determined component order in a vicinity of power pins of non-passive components that are already placed.
摘要翻译： CAD装置包括：确定单元，用于以放置在印刷线路板上的各组件之间的无源部件的部件的阻抗的升序来确定部件顺序。 CAD装置将已被放置的非被动部件的电源引脚附近的确定的分量顺序中的每个无源部件。
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5.发明授权Wiring board design aiding apparatus, design aiding method, storage medium, and computer program 失效接线板设计辅助设备，设计辅助方法，存储介质和计算机程序公开(公告)号：US07257792B2
公开(公告)日：2007-08-14
申请号：US10151368
申请日：2002-05-20
IPC分类号： G06F17/50
CPC分类号： H05K3/0005 , G06F17/5072 , H05K1/0269 , H05K3/303 , H05K3/4644 , H05K2201/09227
摘要： In a design aiding apparatus of the present invention, a plane clearance setting unit acquires information showing a predetermined margin, a component placement unit determines a placement area of a component such that, as seen in a lamination direction of a multilayer wiring board, at least one of the component and a pad connected to the component is included within a candidate area of a plane foil excluding a perimeter area, and a wiring unit determines a placement area of a wiring foil and a via in the same way that the placement area of the component is determined. Furthermore, in regard to a component, a component pad, a wiring foil, and a via whose placement areas have already been determined, a component placement inspection unit reports a design condition violation if the placement area of at least one of the component and the pad deviates outside the candidate area as seen in the lamination direction of the board, and a wiring inspection unit reports a design condition violation if the placement area of the wiring foil or the via deviates outside the candidate area as seen in the lamination direction of the board.
摘要翻译： 在本发明的设计辅助装置中，平面间隙设定单元获取表示预定余量的信息，部件放置单元确定部件的放置面积，使得从多层布线基板的层叠方向看，至少 连接到部件的部件和焊盘中的一个包括在除了周边区域之外的平面箔的候选区域内，并且布线单元以与布置箔和通孔的放置面积相同的方式确定布线箔和通孔的放置面积 确定组件。 此外，对于已经确定了放置区域的部件，部件焊盘，布线箔和通孔，如果部件和部件的至少一个的放置区域，则部件放置检查单元报告设计条件违反 如从电路板的层压方向看，偏移在候选区域外面，如果布线箔或通孔的放置区域偏离候选区域，则布线检查单元报告设计条件违反， 板。
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公开(公告)号：US07781677B2
公开(公告)日：2010-08-24
申请号：US12135668
申请日：2008-06-09
CPC分类号： H04B3/30 , H01B11/00 , H04L25/0272
摘要： A transmission cable that has three signal lines, and in which there is little unwanted radiation noise, is provided. In a section that is perpendicular to the longitudinal direction of the differential transmission cable, the distance between any two signal lines of the three signal lines is equal to a predetermined value. The differential transmission cable is twisted in its longitudinal direction. The differential transmission cable further includes a dielectric core line, and the signal lines are formed on the surface of the dielectric core line. In the differential transmission cable, the signal lines are formed in a helix in the longitudinal direction of the dielectric core line.
摘要翻译： 提供具有三条信号线并且其中没有不希望的辐射噪声的传输电缆。 在与差动传输电缆的纵向方向垂直的部分中，三条信号线的任意两条信号线之间的距离等于预定值。 差速传动电缆在其纵向方向上扭转。 差分传输电缆还包括介质芯线，并且信号线形成在介质芯线的表面上。 在差分传输电缆中，信号线在介质芯线的纵向上以螺旋形成。
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公开(公告)号：US06380064B1
公开(公告)日：2002-04-30
申请号：US09223404
申请日：1998-12-30
IPC分类号： H01L214763
CPC分类号： H01L23/53223 , H01L21/76838 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having a semiconductor substrate and a wiring layer, which is doped with an impurity, located on the substrate. The semiconductor device has upper and lower wiring layers apart from each other. An electric insulating film electrically insulates between the upper and lower wiring layers. The insulating film has a contact hole. A wiring material is packed with the contact hole to electrically connect the upper and lower wiring layers. The impurity is contained in the lower wiring layer to decrease its resistivity.
摘要翻译： 具有半导体衬底和掺杂有杂质的布线层的半导体器件位于衬底上。 半导体器件具有彼此分开的上和下布线层。 电绝缘膜在上下布线层之间电绝缘。 绝缘膜具有接触孔。 布线材料装有接触孔以电连接上下布线层。 杂质包含在下布线层中以降低其电阻率。
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公开(公告)号：US07741876B2
公开(公告)日：2010-06-22
申请号：US12108739
申请日：2008-04-24
IPC分类号： H03K19/094 , H03K19/0175
CPC分类号： H04B3/34 , H01L2224/48137 , H01L2224/49175 , H01L2924/3011 , H04L25/0272 , H05K1/0245 , H05K1/0248 , H05K1/0298 , H05K2201/09236 , H05K2201/09672 , H01L2924/00
摘要： A differential transmission line that has three or more signal lines and with which there is little unwanted radiation noise is provided. The differential transmission line 2 is provided with three signal lines 2a, 2b, and 2c that transmit differential signals from a differential driver IC1 to a differential receiver IC3, and the majority of the signal lines 2a, 2b, and 2c is provided in conductor layers T2 and T3 of a printed circuit board 4. The signal lines 2a, 2b, and 2c are provided with a signal line parallel segment, a signal line route length adjustment segment that is on the differential driver IC1 side and that connects from differential signal output terminals 1Ea, 1Eb, and 1Ec in the differential driver IC1 to the signal line parallel segment, and a signal line route length adjustment segment that is on the differential receiver IC3 side and that connects from the signal line parallel segment to differential signal input terminals in the differential receiver IC3, wherein the signal lines 2a, 2b, and 2c are formed such that their signal line route length adjustment segments on the differential driver IC1 side are equal in length to one another.
摘要翻译： 提供具有三条或更多条信号线并且几乎不存在不需要的辐射噪声的差分传输线。 差分传输线2设置有将差分信号从差分驱动器IC1传输到差分接收器IC3的三条信号线2a，2b和2c，并且大部分信号线2a，2b和2c设置在导体层 信号线2a，2b，2c设置有信号线并行段，信号线路径长度调节段，位于差分驱动器IC1侧，并从差动信号输出端 差分驱动器IC1中的端子1Ea，1Eb和1Ec与信号线并联段，以及信号线路径长度调节段，位于差分接收器IC3侧，并且从信号线并行段连接到差分信号输入端 差分接收器IC3，其中信号线2a，2b和2c形成为使得它们的信号线路径长度调节段在差分驱动器IC1侧 长度相等。
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公开(公告)号：US20080304578A1
公开(公告)日：2008-12-11
申请号：US12135668
申请日：2008-06-09
CPC分类号： H04B3/30 , H01B11/00 , H04L25/0272
摘要： A transmission cable that has three signal lines, and in which there is little unwanted radiation noise, is provided. In a section that is perpendicular to the longitudinal direction of the differential transmission cable, the distance between any two signal lines of the three signal lines is equal to a predetermined value. The differential transmission cable is twisted in its longitudinal direction. The differential transmission cable further includes a dielectric core line, and the signal lines are formed on the surface of the dielectric core line. In the differential transmission cable, the signal lines are formed in a helix in the longitudinal direction of the dielectric core line.
摘要翻译： 提供具有三条信号线并且其中没有不希望的辐射噪声的传输电缆。 在与差动传输电缆的纵向方向垂直的部分中，三条信号线的任意两条信号线之间的距离等于预定值。 差速传动电缆在其纵向方向上扭转。 差分传输电缆还包括介质芯线，并且信号线形成在介质芯线的表面上。 在差分传输电缆中，信号线在介质芯线的纵向上以螺旋形成。
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公开(公告)号：US07388449B2
公开(公告)日：2008-06-17
申请号：US11297288
申请日：2005-12-08
CPC分类号： H04B3/30
摘要： A radiation noise suppression circuit for a differential transmission line includes a differential transmission line which has plus line signal wiring of a differential signal and minus line signal wiring of the differential signal, and connects a differential driver and a differential receiver; signal GND wiring. A first impedance element and a second impedance element have substantially the same impedance value, and are connected in series between the plus line signal wiring and the minus line signal wiring at a location nearer to the differential receiver than a coil unit. A third impedance element is connected to a junction point. The first impedance element and the second impedance element are connected.
摘要翻译： 用于差动传输线的辐射噪声抑制电路包括具有差分信号的正线信号布线和差分信号的负线信号布线的差分传输线，并连接差分驱动器和差分接收器; 信号GND接线。 第一阻抗元件和第二阻抗元件具有基本上相同的阻抗值，并且在比线圈单元更接近差分接收器的位置处串联连接在正线信号布线和负线信号布线之间。 第三阻抗元件连接到连接点。 连接第一阻抗元件和第二阻抗元件。
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