公开(公告)号：US20120224288A1

公开(公告)日：2012-09-06

申请号：US13267224

申请日：2011-10-06

申请人： Shiori UOTA ,  Takahiro Inoue ,  Koji Tamaki ,  Shoichi Orita

发明人： Shiori UOTA ,  Takahiro Inoue ,  Koji Tamaki ,  Shoichi Orita

IPC分类号： H02H3/26

CPC分类号： H03K17/18 ,  H03K17/0828 ,  H03K2217/0027

摘要： A power module includes a current sensing circuit in which a transistor includes an emitter connected to a sense emitter of a current sense element of an IGBT and a base connected to ground, a current sensing resistor including one end thereof connected to a collector of the transistor and the other end thereof connected to a common connection portion. The power module detects, as a current sensing voltage, a potential difference generated by the current sensing resistor based on the common connection portion as a reference, compares the current sensing voltage with a predetermined threshold voltage, and determines whether or not an overcurrent flows through the IGBT according to a magnitude relation therebetween.

摘要翻译： 电源模块包括电流检测电路，其中晶体管包括连接到IGBT的电流感测元件的感测发射极和连接到地的基极的发射极，电流感测电阻器的一端连接到晶体管的集电极 并且其另一端连接到公共连接部分。 功率模块以公共连接部作为基准，将电流检测电阻产生的电位差作为电流检测电压进行检测，将电流检测电压与规定的阈值电压进行比较，判断过电流是否流过 IGBT根据它们之间的大小关系。

公开(公告)号：US09007736B2

公开(公告)日：2015-04-14

申请号：US13267224

申请日：2011-10-06

申请人： Shiori Uota ,  Takahiro Inoue ,  Koji Tamaki ,  Shoichi Orita

发明人： Shiori Uota ,  Takahiro Inoue ,  Koji Tamaki ,  Shoichi Orita

IPC分类号： H02H3/00 ,  H03K17/18 ,  H03K17/082

CPC分类号： H03K17/18 ,  H03K17/0828 ,  H03K2217/0027

摘要： A power module includes a current sensing circuit in which a transistor includes an emitter connected to a sense emitter of a current sense element of an IGBT and a base connected to ground, a current sensing resistor including one end thereof connected to a collector of the transistor and the other end thereof connected to a common connection portion. The power module detects, as a current sensing voltage, a potential difference generated by the current sensing resistor based on the common connection portion as a reference, compares the current sensing voltage with a predetermined threshold voltage, and determines whether or not an overcurrent flows through the IGBT according to a magnitude relation therebetween.

摘要翻译： 电源模块包括电流检测电路，其中晶体管包括连接到IGBT的电流感测元件的感测发射极和连接到地的基极的发射极，电流感测电阻器的一端连接到晶体管的集电极 并且其另一端连接到公共连接部分。 功率模块以公共连接部作为基准，将电流检测电阻产生的电位差作为电流检测电压进行检测，将电流检测电压与规定的阈值电压进行比较，判断过电流是否流过 IGBT根据它们之间的大小关系。

公开(公告)号：US09182772B2

公开(公告)日：2015-11-10

申请号：US13691811

申请日：2012-12-02

申请人： Shiori Uota ,  Takahiro Inoue ,  Koji Tamaki ,  Shoichi Orita

发明人： Shiori Uota ,  Takahiro Inoue ,  Koji Tamaki ,  Shoichi Orita

IPC分类号： H03B1/00 ,  H03K3/00 ,  G05F1/66 ,  H03K3/012

CPC分类号： G05F1/66 ,  H02M1/08 ,  H02M1/44 ,  H02M2001/0054 ,  H03K3/012 ,  H03K17/0406 ,  H03K17/162 ,  H03K17/168 ,  H03K2217/0036 ,  Y02B70/1491

摘要： A power device control circuit enters a gate driving signal into a gate terminal of a power device. The power device control circuit includes: a control signal input circuit that receives a power device control signal for control of the power device; a driving system control circuit connected to the control signal input circuit; a driving circuit with a plurality of driving systems, the driving circuit driving the power device in response to a driving circuit control signal received from the driving system control circuit; and a timer circuit that makes switching between the driving systems in response to the driving circuit control signal after elapse of a given period of time from receipt of a predetermined signal, specifically the power device control signal, thereby changing the driving power of the driving system control circuit to drive the power device.

摘要翻译： 功率器件控制电路将栅极驱动信号输入到功率器件的栅极端子。 功率器件控制电路包括：控制信号输入电路，其接收用于控制功率器件的功率器件控制信号; 连接到所述控制信号输入电路的驱动系统控制电路; 具有多个驱动系统的驱动电路，所述驱动电路响应于从所述驱动系统控制电路接收的驱动电路控制信号来驱动所述功率器件; 以及定时器电路，其在从接收到预定信号（特别是功率器件控制信号）经过给定时间段之后响应于驱动电路控制信号在驱动系统之间切换，由此改变驱动系统的驱动功率 控制电路驱动电源设备。

公开(公告)号：US20120099234A1

公开(公告)日：2012-04-26

申请号：US13184737

申请日：2011-07-18

申请人： Takahiro Inoue ,  Shoichi Orita ,  Koji Tamaki

发明人： Takahiro Inoue ,  Shoichi Orita ,  Koji Tamaki

IPC分类号： H02H3/08 ,  H03K3/00

CPC分类号： H02M1/08

摘要： A driving circuit is placed on an IC chip, and which drives a semiconductor switching element. The driving circuit includes: a power supply circuit for receiving a first voltage supplied from a single power supply provided outside the IC chip, generating a second voltage based on the first voltage, and applying the second voltage to a reference terminal of the semiconductor switching element; and a driving part for driving the semiconductor switching element by applying the first voltage or stopping application of the first voltage to a control terminal of the semiconductor switching element in response to an input signal given from outside the IC chip.

摘要翻译： 驱动电路放置在IC芯片上，驱动半导体开关元件。 所述驱动电路包括：电源电路，用于接收从设置在所述IC芯片外部的单个电源提供的第一电压，基于所述第一电压产生第二电压，并将所述第二电压施加到所述半导体开关元件的基准端子 ; 以及驱动部件，用于响应于从IC芯片外部给出的输入信号，施加第一电压或停止对半导体开关元件的控制端施加第一电压来驱动半导体开关元件。

公开(公告)号：US08537515B2

公开(公告)日：2013-09-17

申请号：US13184737

申请日：2011-07-18

申请人： Takahiro Inoue ,  Shoichi Orita ,  Koji Tamaki

发明人： Takahiro Inoue ,  Shoichi Orita ,  Koji Tamaki

IPC分类号： H02H3/20 ,  H02H3/24 ,  H02H9/04

CPC分类号： H02M1/08

摘要： A driving circuit is placed on an IC chip, and which drives a semiconductor switching element. The driving circuit includes: a power supply circuit for receiving a first voltage supplied from a single power supply provided outside the IC chip, generating a second voltage based on the first voltage, and applying the second voltage to a reference terminal of the semiconductor switching element; and a driving part for driving the semiconductor switching element by applying the first voltage or stopping application of the first voltage to a control terminal of the semiconductor switching element in response to an input signal given from outside the IC chip.

摘要翻译： 驱动电路放置在IC芯片上，驱动半导体开关元件。 所述驱动电路包括：电源电路，用于接收从设置在所述IC芯片外部的单个电源提供的第一电压，基于所述第一电压产生第二电压，并将所述第二电压施加到所述半导体开关元件的基准端子 ; 以及驱动部件，用于响应于从IC芯片外部给出的输入信号，施加第一电压或停止对半导体开关元件的控制端施加第一电压来驱动半导体开关元件。

公开(公告)号：US5917359A

公开(公告)日：1999-06-29

申请号：US671545

申请日：1996-06-27

申请人： Masanori Fukunaga ,  Shoichi Orita

发明人： Masanori Fukunaga ,  Shoichi Orita

IPC分类号： H03K17/08 ,  H03K3/037 ,  H03K17/06 ,  H03K17/16 ,  H03K19/0175

CPC分类号： H03K17/16 ,  H03K17/063 ,  H03K3/0375 ,  H01L2924/0002

摘要： The drain electrodes of HNMOS transistors (2) and (3) are connected to the first ends of resistors (4) and (5), and to the inputs of inverter circuits (6) and (7) respectively. The outputs of the inverter circuits (6) and (7) are connected to the inputs of a protection circuit (27). The outputs of the protection circuit (27) are connected to the set and reset inputs of a flip-flop circuit (10A). The protection circuit (27) serves to prevent the malfunction of the flip-flop circuit (10A) from occurring and is formed by a logic gate. Having this configuration high potential side power device driving circuit is provided wherein the pulse widths of signals input to the gate electrodes of transistors for level shift can be set optionally, the lag time of the signal is not caused by a passage through a filter circuit, and the malfunction of a flip-flop circuit can be prevented from occurring due to a dv/dt current without lowering the response performance of a power device.

摘要翻译： HNMOS晶体管（2）和（3）的漏电极分别连接到电阻器（4）和（5）的第一端，并分别连接到反相器电路（6）和（7）的输入端。 逆变器电路（6）和（7）的输出端连接到保护电路（27）的输入端。 保护电路（27）的输出端连接到触发器电路（10A）的置位和复位输入端。 保护电路（27）用于防止触发电路（10A）的故障发生并由逻辑门形成。 具有这种配置的高电位侧功率器件驱动电路，其中输入到用于电平移位的晶体管的栅电极的信号的脉冲宽度可以任意设定，信号的滞后时间不是由于通过滤波电路而引起的， 并且可以防止由于dv / dt电流而发生触发电路的故障而不降低功率器件的响应性能。

公开(公告)号：US06529061B1

公开(公告)日：2003-03-04

申请号：US10118251

申请日：2002-04-09

申请人： Shoichi Orita

发明人： Shoichi Orita

IPC分类号： H03K1716

CPC分类号： H03K17/063 ,  H03K17/162

摘要： In a level-shift circuit of the high-side section of an HVIC, a switching-on level-shift resistance member includes two resistors, and a switching-off level-shift resistance member includes two resistors. A logic filter set fetches potentials of the both end of the resistor as signals Aon and Bon, and fetches potentials of the both end of the resistor as signals Aoff and Boff. When an output period of the signals Bon and Boff is longer than that of the signals Aon and Aoff, the logic filter set does not output an abnormal signal by judging that a recoverry signal is detected.

摘要翻译： 在HVIC的高侧部分的电平移位电路中，接通电平移动电阻部件包括两个电阻器，并且关断电平移动电阻部件包括两个电阻器。 逻辑滤波器组取电阻器两端的电位作为信号Aon和Bon，并将电阻两端的电位取为信号Aoff和Boff。 当信号Bon和Boff的输出周期长于信号Aon和Aoff的输出周期时，逻辑滤波器组不通过判断检测到恢复信号而输出异常信号。

公开(公告)号：US06498738B1

公开(公告)日：2002-12-24

申请号：US10118252

申请日：2002-04-09

申请人： Shoichi Orita ,  Yoshikazu Tanaka

发明人： Shoichi Orita ,  Yoshikazu Tanaka

IPC分类号： H02M324

CPC分类号： H03K19/018521 ,  H03K17/18 ,  H03K2217/0063

摘要： A reverse level shift circuit that is low in cost and excellent in reliability is provided by employing no Pch-DMOS transistor and forming it together with a level shift circuit on one semiconductor substrate. An input voltage signal (VIN) on high side is converted to a current signal by a voltage-current conversion circuit (CV1) and a current source (CS1). Using a Nch-DMOS transistor (ND1) of common gate construction as a high breakdown voltage resistance, the current signal is then transferred to low side, on which the current signal is converted to a voltage signal by a current source (CS2) and a current-voltage conversion circuit (CV2). Thereby, the signal change of the signal (VIN) using potential (HGND) as a reference potential can be outputted as a signal change of signal (VOUT) that uses potential (GND) as a reference potential.

摘要翻译： 通过不使用Pch-DMOS晶体管并且在一个半导体衬底上与电平移位电路一起形成，从而提供成本低且可靠性优异的反向电平移位电路。 高压侧的输入电压信号（VIN）由电压 - 电流转换电路（CV1）和电流源（CS1）转换为电流信号。 使用公共栅极结构的Nch-DMOS晶体管（ND1）作为高耐击穿电压电阻，然后将电流信号传送到低电平，电流信号由电流源（CS2）转换为电压信号， 电流 - 电压转换电路（CV2）。 因此，作为基准电位的电位（HGND）的信号（VIN）的信号变化可以作为使用电位（GND）作为参考电位的信号（VOUT）的信号变化来输出。

公开(公告)号：US20050144539A1

公开(公告)日：2005-06-30

申请号：US10895836

申请日：2004-07-22

申请人： Shoichi Orita

发明人： Shoichi Orita

IPC分类号： H01L27/04 ,  G06F11/00 ,  H01L21/822 ,  H02M1/08 ,  H03K17/0812 ,  H03K17/16 ,  H03K19/00 ,  H03K19/0175 ,  H03K19/0185

CPC分类号： H03K17/162 ,  H03K17/08122

摘要： A false signal detection circuit is connected in parallel to a level shift circuit. The false signal detection circuit has the same configuration as those of on-level shift and off-level shift circuits in the level shift circuit, except that an HVMOS is a dummy switching device. Voltage drop developed in a false signal detecting resistor is sent as a false signal indication signal indicating generation of a false signal in the level shift circuit through a NOT gate to a malfunction prevention circuit. In response to the input of the false signal indication signal, the malfunction prevention circuit performs predetermined processing for malfunction prevention.

摘要翻译： 误信号检测电路与电平移位电路并联连接。 除了HVMOS是虚拟开关装置之外，假信号检测电路具有与电平移位电路中的电平移位和关断电平移位电路相同的配置。 在错误信号检测电阻器中产生的电压降被作为伪信号指示信号发送，该信号指示电平移位电路中通过非门向故障防止电路产生假信号。 响应于错误信号指示信号的输入，故障防止电路执行用于故障预防的预定处理。