公开(公告)号：US09874887B2

公开(公告)日：2018-01-23

申请号：US13404981

申请日：2012-02-24

申请人： Shouli Yan ,  Alan Westwick

发明人： Shouli Yan ,  Alan Westwick

IPC分类号： G05F1/00 ,  G05F1/565

CPC分类号： G05F1/565

摘要： A voltage regulator circuit with variable feedback is disclosed. In one embodiment, a voltage regulator includes an amplifier having a first input configured to receive a reference voltage and a second input configured to receive a feedback signal. The voltage regulator further includes first and second transistors each having respective gate terminals coupled to an output of the amplifier. A resistor network coupled to the second input of the amplifier and further coupled to the first and second transistors. The resistor network is configured to produce the feedback signal based on currents through the first and second transistors, respectively.

公开(公告)号：US20130221937A1

公开(公告)日：2013-08-29

申请号：US13404981

申请日：2012-02-24

申请人： Shouli Yan ,  Alan Westwick

发明人： Shouli Yan ,  Alan Westwick

IPC分类号： G05F1/10

CPC分类号： G05F1/565

摘要： A voltage regulator circuit with variable feedback is disclosed. In one embodiment, a voltage regulator includes an amplifier having a first input configured to receive a reference voltage and a second input configured to receive a feedback signal. The voltage regulator further includes first and second transistors each having respective gate terminals coupled to an output of the amplifier. A resistor network coupled to the second input of the amplifier and further coupled to the first and second transistors. The resistor network is configured to produce the feedback signal based on currents through the first and second transistors, respectively.

摘要翻译： 公开了一种具有可变反馈的稳压电路。 在一个实施例中，电压调节器包括具有被配置为接收参考电压的第一输入的放大器和被配置为接收反馈信号的第二输入。 电压调节器还包括第一和第二晶体管，每个具有耦合到放大器的输出的相应的栅极端子。 耦合到放大器的第二输入端并进一步耦合到第一和第二晶体管的电阻网络。 电阻网络被配置为基于分别通过第一和第二晶体管的电流产生反馈信号。

公开(公告)号：US20130249724A1

公开(公告)日：2013-09-26

申请号：US13427740

申请日：2012-03-22

申请人： Alan Westwick ,  Sebastian Ahmed

发明人： Alan Westwick ,  Sebastian Ahmed

IPC分类号： H03M1/20

CPC分类号： H03M1/661

摘要： A system and method for generating an analog signal is disclosed. In one embodiment, system includes a first-in, first-out (FIFO) buffer configured to receive and store a plurality of digital values written to the FIFO buffer. The system further includes a digital-to-analog converter (DAC) coupled to read the digital values from the FIFO buffer and configured to convert the digital values to an analog signal. The FIFO buffer is configured to operate in a first mode in which writes to the FIFO buffer are inhibited and current digital values stored in the FIFO buffer are provided to the DAC in a repeating sequence.

摘要翻译： 公开了一种用于产生模拟信号的系统和方法。 在一个实施例中，系统包括被配置为接收和存储写入FIFO缓冲器的多个数字值的先入先出（FIFO）缓冲器。 该系统还包括数模转换器（DAC），其被耦合以读取来自FIFO缓冲器的数字值，并被配置为将数字值转换为模拟信号。 FIFO缓冲器被配置为在第一模式下操作，其中对FIFO缓冲器的写入被禁止，并且存储在FIFO缓冲器中的当前数字值以重复的顺序被提供给DAC。

公开(公告)号：US20060244525A1

公开(公告)日：2006-11-02

申请号：US11278078

申请日：2006-03-30

申请人： Alan Westwick ,  Susanne Paul

发明人： Alan Westwick ,  Susanne Paul

IPC分类号： H03F1/36

CPC分类号： H03F3/189 ,  H03F1/30 ,  H03F3/45941

摘要： A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.

摘要翻译： 一种方法和装置用于在多级功率放大器中提供直流稳定和降噪。 本发明使用各种反馈技术来稳定DC电平，这有助于降低噪声。 本发明还使用其它技术来降低噪声并降低功率放大器中的噪声传递功能。

公开(公告)号：US20050134378A1

公开(公告)日：2005-06-23

申请号：US10743220

申请日：2003-12-22

申请人： Alan Westwick ,  Timothy Dupuis ,  Susanne Paul

发明人： Alan Westwick ,  Timothy Dupuis ,  Susanne Paul

IPC分类号： H03F1/00 ,  H03F1/30 ,  H03F3/26 ,  H03F3/68

CPC分类号： H03F3/265 ,  H03F1/301 ,  H03F3/68

摘要： A method and apparatus provides an input structure for a power amplifier. In one example, the input structure has an input network and a predriver circuit to provide an input signal to the power amplifier. The input network includes a transformer for helping to maintain a constant input impedance. The predriver includes a limiting amplifier that provides isolation between the power amplifier and the RF input. A DC feedback circuit is used by the predriver that maintains the DC level of the inverters to a desired level.

摘要翻译： 方法和装置提供功率放大器的输入结构。 在一个示例中，输入结构具有输入网络和预驱动电路，以向功率放大器提供输入信号。 输入网络包括用于帮助保持恒定输入阻抗的变压器。 预驱动器包括限幅放大器，可在功率放大器和RF输入之间提供隔离。 预驱动器使用DC反馈电路，将逆变器的直流电平维持在期望的水平。

公开(公告)号：US08669892B2

公开(公告)日：2014-03-11

申请号：US13427740

申请日：2012-03-22

申请人： Alan Westwick ,  Sebastian Ahmed

发明人： Alan Westwick ,  Sebastian Ahmed

IPC分类号： H03M1/66

CPC分类号： H03M1/661

摘要： A system and method for generating an analog signal is disclosed. In one embodiment, system includes a first-in, first-out (FIFO) buffer configured to receive and store a plurality of digital values written to the FIFO buffer. The system further includes a digital-to-analog converter (DAC) coupled to read the digital values from the FIFO buffer and configured to convert the digital values to an analog signal. The FIFO buffer is configured to operate in a first mode in which writes to the FIFO buffer are inhibited and current digital values stored in the FIFO buffer are provided to the DAC in a repeating sequence.

摘要翻译： 公开了一种用于产生模拟信号的系统和方法。 在一个实施例中，系统包括被配置为接收和存储写入FIFO缓冲器的多个数字值的先入先出（FIFO）缓冲器。 该系统还包括数模转换器（DAC），其被耦合以读取来自FIFO缓冲器的数字值，并被配置为将数字值转换为模拟信号。 FIFO缓冲器被配置为在第一模式下操作，其中对FIFO缓冲器的写入被禁止，并且存储在FIFO缓冲器中的当前数字值以重复的顺序被提供给DAC。

公开(公告)号：US08023557B2

公开(公告)日：2011-09-20

申请号：US11968105

申请日：2007-12-31

申请人： Nicolas Constantinidis ,  Guillaume Crinon ,  Alexandre Rouxel ,  Alan Westwick ,  Gary Franzosa ,  Didier Gallais ,  Marty Lynn Pflum

发明人： Nicolas Constantinidis ,  Guillaume Crinon ,  Alexandre Rouxel ,  Alan Westwick ,  Gary Franzosa ,  Didier Gallais ,  Marty Lynn Pflum

IPC分类号： H04B1/38 ,  H04B1/16 ,  H04L23/00

CPC分类号： H04W52/028 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/162 ,  Y02D70/22

摘要： A method is disclosed for controlling the operation of a low power radio platform that realizes the physical layer (PHY) with a software portion and an analog front end, the analog front end disposed between the DSP and an antenna, and realizes the MAC layer with a microcontroller unit (MCU). The DSP, analog front end and MCU are maintained in a low power mode of operation when not in data communication. When data communication is initiated, a hardware controller controls at least one hardware interface disposed between the DSP and the analog front end to initiate multiple time based tasks to transfer data to and from a buffer. During the execution of these tasks, the controller causes a task in the DSP to be initiated for processing of data in the buffers and, upon completion of at least one of the tasks, notifying the MCU of such. The controller controls the hardware interface to terminate operation when predetermined time based events have occurred. The MCU in at least one mode of operation thereof is operable to initiate the operation of the hardware controller and then convert to a low power mode of operation to await notification.

摘要翻译： 公开了一种用于控制利用软件部分和模拟前端实现物理层（PHY）的低功率无线电平台的操作的方法，模拟前端设置在DSP和天线之间，并且实现MAC层与 微控制器单元（MCU）。 DSP，模拟前端和MCU在不进行数据通信时，都处于低功耗操作模式。 当数据通信发起时，硬件控制器控制至少一个配置在DSP和模拟前端之间的硬件接口，以启动多个基于时间的任务，以将数据传送到缓冲器和从缓冲器传输数据。 在执行这些任务期间，控制器使得DSP中的任务被启动以处理缓冲器中的数据，并且在完成至少一个任务时通知MCU。 当发生预定的基于时间的事件时，控制器控制硬件接口终止操作。 MCU中的至少一种操作模式可操作以启动硬件控制器的操作，然后转换为低功率操作模式以等待通知。

公开(公告)号：US07821441B2

公开(公告)日：2010-10-26

申请号：US12339757

申请日：2008-12-19

申请人： Alan Westwick ,  Xiaoling Guo

发明人： Alan Westwick ,  Xiaoling Guo

IPC分类号： H03M1/34

CPC分类号： H03M1/002 ,  H03M1/462

摘要： A successive approximation analog-to-digital converter includes a capacitor array having a plurality of switch capacitors therein with varying weights, each having a common plate connected to a common node and a switched plate. A SAR controller samples an input voltage on said capacitor array in a sampling phase and redistributes the charge stored therein in a conversion phase by selectively increasing the voltage on select capacitors of the capacitor array in accordance with a SAR conversion algorithm. Circuitry controls the sampling of the input voltage by the capacitor array and is responsive to at least one applied bias current. The at least one applied bias current operates at a first level responsive to a first mode of operation of the SAR ADC and operates at a second level responsive to a second mode of operation of the SAR ADC.

摘要翻译： 逐次逼近模数转换器包括其中具有多个重量变化的开关电容器的电容器阵列，每个开关电容器具有连接到公共节点和开关板的公共板。 SAR控制器以采样相位对所述电容器阵列上的输入电压进行采样，并且通过根据SAR转换算法选择性地增加电容器阵列的选择电容器上的电压来重新分配存储在转换阶段的电荷。 电路控制电容器阵列对输入电压的采样，并响应至少一个施加的偏置电流。 响应于SAR ADC的第一工作模式，至少一个施加的偏置电流工作在第一电平，并响应于SAR ADC的第二工作模式而工作在第二电平。

公开(公告)号：US20060208799A1

公开(公告)日：2006-09-21

申请号：US11321753

申请日：2005-12-29

申请人： Susanne Paul ,  Alan Westwick ,  Timothy Dupuis

发明人： Susanne Paul ,  Alan Westwick ,  Timothy Dupuis

IPC分类号： H03F3/45

CPC分类号： H03F3/193 ,  H01L23/645 ,  H01L2223/6644 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3011 ,  H03F3/195 ,  H03F3/2173 ,  H03F3/2176 ,  H03F3/30 ,  H03F3/45224 ,  H03F3/72 ,  H03F2203/45644 ,  H03F2203/45704 ,  H03K17/04163 ,  H03K17/6872 ,  H01L2224/0401

摘要： A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals. Differential RF power amplifiers are also provided with inductive networks coupled at various nodes of the power amplifiers.

摘要翻译： 提供了一种用于功率放大器的方法和装置，用于降低晶体管经受的峰值电压。 功率放大器设置有第一和第二开关装置和连接在开关装置之间的电感器。 驱动开关装置，使得开关装置在相同的时间间隔期间被接通和断开。 差分RF功率放大器还提供耦合在功率放大器各个节点的感应网络。

公开(公告)号：US20050134376A1

公开(公告)日：2005-06-23

申请号：US10743221

申请日：2003-12-22

申请人： Alan Westwick ,  Susanne Paul

发明人： Alan Westwick ,  Susanne Paul

IPC分类号： H03F1/30 ,  H03F3/45 ,  H03F1/36

CPC分类号： H03F3/189 ,  H03F1/30 ,  H03F3/45941

摘要： A method and apparatus is used to provide DC stabilization and noise reduction in a multistage power amplifier. The invention uses various feedback techniques to stabilize DC levels, which helps to reduce noise. The invention also uses other techniques to reduce noise, and to reduce the noise transfer function in a power amplifier.

摘要翻译： 一种方法和装置用于在多级功率放大器中提供直流稳定和降噪。 本发明使用各种反馈技术来稳定DC电平，这有助于降低噪声。 本发明还使用其它技术来降低噪声并降低功率放大器中的噪声传递功能。