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    Silicon carbide semiconductor device and method for manufacturing the same
    1.
    发明授权
    Silicon carbide semiconductor device and method for manufacturing the same 有权
    碳化硅半导体器件及其制造方法

    公开(公告)号：US08350270B2

    公开(公告)日：2013-01-08

    申请号：US12921250

    申请日：2009-03-04

    申请人： Shoyu Watanabe ,  Shuhei Nakata ,  Kenichi Ohtsuka

    发明人： Shoyu Watanabe ,  Shuhei Nakata ,  Kenichi Ohtsuka

    IPC分类号： H01L29/161

    CPC分类号： H01L29/7802 ,  H01L21/047 ,  H01L29/0642 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/32 ,  H01L29/66068

    摘要： A silicon carbide MOSFET that exhibits a high source-to-drain withstand voltage and that involves a smaller difference between gate-to-drain capacitance achieved in an activated state and gate-to-drain capacitance achieved in a deactivated state. A silicon carbide drift layer of a first conductivity type is provided on a silicon carbide substrate of a first conductivity type; a pair of base regions are provided in a surface layer portion of the silicon carbide drift layer and exhibit a second conductivity type; a pair of source regions are provided in interiors of surface layer portions of the pair of base regions and exhibit a first conductivity type; and semi-insulating regions are provided between the silicon carbide substrate and the pair of base regions.

    摘要翻译： 表现出高的源极 - 漏极耐受电压并且在激活状态下实现的栅 - 漏电容与在去激活状态下实现的栅 - 漏电容之间的较小差异的碳化硅MOSFET。 在第一导电类型的碳化硅衬底上提供第一导电类型的碳化硅漂移层; 在碳化硅漂移层的表层部分设置一对基区，呈现第二导电型; 一对源极区域设置在一对基极区域的表层部分的内部并呈现出第一导电类型; 并且在碳化硅衬底和一对基极区之间设置半绝缘区域。

    SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    3.
    发明申请
    SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    硅碳化硅半导体器件及其制造方法

    公开(公告)号：US20110012133A1

    公开(公告)日：2011-01-20

    申请号：US12921250

    申请日：2009-03-04

    申请人： Shoyu Watanabe ,  Shuhei Nakata ,  Kenichi Ohtsuka

    发明人： Shoyu Watanabe ,  Shuhei Nakata ,  Kenichi Ohtsuka

    IPC分类号： H01L29/772 ,  H01L21/20

    CPC分类号： H01L29/7802 ,  H01L21/047 ,  H01L29/0642 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/32 ,  H01L29/66068

    摘要： A silicon carbide MOSFET that exhibits a high source-to-drain withstand voltage and that involves a smaller difference between gate-to-drain capacitance achieved in an activated state and gate-to-drain capacitance achieved in a deactivated state. A silicon carbide drift layer of a first conductivity type is provided on a silicon carbide substrate of a first conductivity type; a pair of base regions are provided in a surface layer portion of the silicon carbide drift layer and exhibit a second conductivity type; a pair of source regions are provided in interiors of surface layer portions of the pair of base regions and exhibit a first conductivity type; and semi-insulating regions are provided between the silicon carbide substrate and the pair of base regions.

    摘要翻译： 表现出高的源极 - 漏极耐受电压并且在激活状态下实现的栅 - 漏电容与在去激活状态下实现的栅 - 漏电容之间的较小差异的碳化硅MOSFET。 在第一导电类型的碳化硅衬底上提供第一导电类型的碳化硅漂移层; 在碳化硅漂移层的表层部分设置一对基区，呈现第二导电型; 一对源极区域设置在一对基极区域的表层部分的内部并呈现出第一导电类型; 并且在碳化硅衬底和一对基极区之间设置半绝缘区域。

    Semiconductor device and method for manufacturing the same
    5.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US09105715B2

    公开(公告)日：2015-08-11

    申请号：US13146654

    申请日：2009-04-30

    申请人： Naruhisa Miura ,  Shuhei Nakata ,  Kenichi Ohtsuka ,  Shoyu Watanabe ,  Naoki Yutani

    发明人： Naruhisa Miura ,  Shuhei Nakata ,  Kenichi Ohtsuka ,  Shoyu Watanabe ,  Naoki Yutani

    IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/16 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49

    CPC分类号： H01L29/7811 ,  H01L23/53209 ,  H01L29/0611 ,  H01L29/0615 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/45 ,  H01L29/4916 ,  H01L29/4941 ,  H01L29/4975 ,  H01L29/66068 ,  H01L29/7805 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second conductivity type is in the upper surface of the first major surface on a peripheral portion of the cell region. A second gate insulating film is on the second well, and a thick field oxide film is on the peripheral side than the second gate insulating film. A second gate electrode is sequentially on the second gate insulating film and the field oxide film and electrically connected to the first gate electrode. A first electrode is connected to the first, second well and the diffusion region. A second electrode is connected on a second major surface of the semiconductor substrate. A gate wiring is on the field oxide film, going around a periphery of the cell region, and electrically connected to the second gate electrode. The gate wiring is a silicide of a constituting substance of the second gate electrode.

    摘要翻译： 在第一导电类型的半导体衬底的第一主表面的单元区域中，第二导电类型的第一阱位于上表面。 第一导电类型的扩散区位于第一阱的上表面。 第一栅极绝缘膜在第一阱上，第一栅极电极在第一栅极绝缘膜上。 第二导电类型的第二阱在电池区域的周边部分的第一主表面的上表面中。 第二栅绝缘膜在第二阱上，厚场氧化膜位于比第二栅极绝缘膜更外侧。 第二栅电极顺序地在第二栅极绝缘膜和场氧化物膜上电连接到第一栅电极。 第一电极连接到第一，第二阱和扩散区。 第二电极连接在半导体衬底的第二主表面上。 栅极布线在场氧化膜上，绕电池区的周围，并电连接到第二栅电极。 栅极布线是第二栅电极的构成物质的硅化物。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20110284874A1

    公开(公告)日：2011-11-24

    申请号：US13146654

    申请日：2009-04-30

    申请人： Naruhisa Miura ,  Shuhei Nakata ,  Kenichi Ohtsuka ,  Shoyu Watanabe ,  Naoki Yutani

    发明人： Naruhisa Miura ,  Shuhei Nakata ,  Kenichi Ohtsuka ,  Shoyu Watanabe ,  Naoki Yutani

    IPC分类号： H01L29/78 ,  H01L21/8238

    CPC分类号： H01L29/7811 ,  H01L23/53209 ,  H01L29/0611 ,  H01L29/0615 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/45 ,  H01L29/4916 ,  H01L29/4941 ,  H01L29/4975 ,  H01L29/66068 ,  H01L29/7805 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second conductivity type is in the upper surface of the first major surface on a peripheral portion of the cell region. A second gate insulating film is on the second well, and a thick field oxide film is on the peripheral side than the second gate insulating film. A second gate electrode is sequentially on the second gate insulating film and the field oxide film and electrically connected to the first gate electrode. A first electrode is connected to the first, second well and the diffusion region. A second electrode is connected on a second major surface of the semiconductor substrate. A gate wiring is on the field oxide film, going around a periphery of the cell region, and electrically connected to the second gate electrode. The gate wiring is a silicide of a constituting substance of the second gate electrode.

    摘要翻译： 在第一导电类型的半导体衬底的第一主表面的单元区域中，第二导电类型的第一阱位于上表面。 第一导电类型的扩散区位于第一阱的上表面。 第一栅极绝缘膜在第一阱上，第一栅极电极在第一栅极绝缘膜上。 第二导电类型的第二阱在电池区域的周边部分的第一主表面的上表面中。 第二栅绝缘膜在第二阱上，厚场氧化膜位于比第二栅极绝缘膜更外侧。 第二栅电极顺序地在第二栅极绝缘膜和场氧化物膜上电连接到第一栅电极。 第一电极连接到第一，第二阱和扩散区。 第二电极连接在半导体衬底的第二主表面上。 栅极布线位于场氧化膜上，绕着单元区域的周边，并与第二栅电极电连接。 栅极布线是第二栅电极的构成物质的硅化物。

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08860039B2

    公开(公告)日：2014-10-14

    申请号：US13638970

    申请日：2011-04-07

    申请人： Naruhisa Miura ,  Shuhei Nakata ,  Kenichi Ohtsuka ,  Shoyu Watanabe ,  Hiroshi Watanabe

    发明人： Naruhisa Miura ,  Shuhei Nakata ,  Kenichi Ohtsuka ,  Shoyu Watanabe ,  Hiroshi Watanabe

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/20 ,  H01L29/16 ,  H01L29/06 ,  H01L29/08

    CPC分类号： H01L29/1608 ,  H01L29/0615 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1602 ,  H01L29/2003 ,  H01L29/66045 ,  H01L29/66068 ,  H01L29/66712 ,  H01L29/781 ,  H01L29/7811

    摘要： A semiconductor device having a low feedback capacitance and a low switching loss. The semiconductor device includes: a substrate; a drift layer formed on a surface of the semiconductor substrate; a plurality of first well regions formed on a surface of the drift layer; a source region which is an area formed on a surface of each of the first well regions and defining, as a channel region, the surface of each of the first well regions interposed between the area and the drift layer; a gate electrode formed over the channel region and the drift layer thereacross through a gate insulating film; and second well regions buried inside the drift layer below the gate electrode and formed to be individually connected to each of the first well regions adjacent to one another.

    摘要翻译： 具有低反馈电容和低开关损耗的半导体器件。 半导体器件包括：衬底; 形成在所述半导体衬底的表面上的漂移层; 多个第一阱区，形成在所述漂移层的表面上; 源区域，其是形成在每个第一阱区域的表面上的区域，并且限定插入在该区域和漂移层之间的每个第一阱区域的沟道区域; 形成在所述沟道区域上的栅电极和穿过栅极绝缘膜的所述漂移层; 以及埋在栅电极下方的漂移层内的第二阱区，并形成为分别连接到彼此相邻的每个第一阱区。