公开(公告)号：US20140021466A1

公开(公告)日：2014-01-23

申请号：US13937591

申请日：2013-07-09

申请人： Shunpei YAMAZAKI ,  Naoya SAKAMOTO ,  Takahiro SATO ,  Shunsuke KOSHIOKA ,  Takayuki CHO ,  Yoshitaka YAMAMOTO ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI

发明人： Shunpei YAMAZAKI ,  Naoya SAKAMOTO ,  Takahiro SATO ,  Shunsuke KOSHIOKA ,  Takayuki CHO ,  Yoshitaka YAMAMOTO ,  Takuya MATSUO ,  Hiroshi MATSUKIZONO ,  Yosuke KANZAKI

IPC分类号： H01L29/786 ,  H01L29/201

CPC分类号： H01L29/7869 ,  H01L29/201

摘要： A semiconductor device includes a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film in contact with the gate insulating film and including a channel formation region which overlaps with the gate electrode; a source electrode and a drain electrode over the oxide semiconductor film; and an oxide insulating film over the oxide semiconductor film, the source electrode, and the drain electrode. The source electrode and the drain electrode each include a first metal film having an end portion at the end of the channel formation region, a second metal film over the first metal film and containing copper, and a third metal film over the second metal film. The second metal film is formed on the inner side than the end portion of the first metal film.

摘要翻译： 半导体器件包括栅电极; 栅电极上的栅极绝缘膜; 与所述栅极绝缘膜接触并且包括与所述栅电极重叠的沟道形成区域的氧化物半导体膜; 氧化物半导体膜上的源电极和漏电极; 以及氧化物半导体膜，源电极和漏电极上的氧化物绝缘膜。 源极电极和漏极电极各自包括在沟道形成区域的端部具有端部的第一金属膜，在第一金属膜上的含有铜的第二金属膜和在第二金属膜上的第三金属膜。 第二金属膜形成在比第一金属膜的端部的内侧。

公开(公告)号：US20090011611A1

公开(公告)日：2009-01-08

申请号：US12130307

申请日：2008-05-30

申请人： Mitsuhiro ICHIJO ,  Tetsuhiro TANAKA ,  Takashi OHTSUKI ,  Seiji YASUMOTO ,  Kenichi OKAZAKI ,  Shunpei YAMAZAKI ,  Naoya SAKAMOTO

发明人： Mitsuhiro ICHIJO ,  Tetsuhiro TANAKA ,  Takashi OHTSUKI ,  Seiji YASUMOTO ,  Kenichi OKAZAKI ,  Shunpei YAMAZAKI ,  Naoya SAKAMOTO

IPC分类号： H01L21/469

CPC分类号： H01L21/31608 ,  C23C16/4404 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/4908

摘要： It is an object to provide a method for manufacturing a semiconductor device that has a semiconductor element including a film in which mixing impurities is suppressed. It is another object to provide a method for manufacturing a semiconductor device with high yield. In a method for manufacturing a semiconductor device in which an insulating film is formed in contact with a semiconductor layer provided over a substrate having an insulating surface with use of a plasma CVD apparatus, after an inner wall of a reaction chamber of the plasma CVD apparatus is coated with a film that does not include an impurity to the insulating film, a substrate is introduced in the reaction chamber, and the insulating film is deposited over the substrate. As a result, an insulating film in which the amount of impurities is reduced can be formed.

摘要翻译： 本发明的目的是提供一种制造半导体器件的方法，该半导体器件具有包含其中抑制混合杂质的膜的半导体元件。 另一个目的是提供一种以高产率制造半导体器件的方法。 在制造半导体器件的方法中，其中绝缘膜与使用等离子体CVD装置的具有绝缘表面的衬底上提供的半导体层形成接触，在等离子体CVD装置的反应室的内壁 涂覆有不含杂质的薄膜，在反应室中引入基板，并将绝缘膜沉积在基板上。 结果，可以形成其中杂质减少量的绝缘膜。