公开(公告)号：US20090324162A1

公开(公告)日：2009-12-31

申请号：US12164580

申请日：2008-06-30

申请人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

发明人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

IPC分类号： G02B6/12 ,  H01L21/302

CPC分类号： G02B6/30 ,  B82Y20/00 ,  G02B6/1223

摘要： An optoelectronic circuit fabrication method and integrated circuit apparatus fabricated therewith. Integrated circuits are fabricated with an integral optical coupling transition to efficiently couple optical energy from an optical fiber to an integrated optical waveguide on the integrated circuit. Layers of specific materials are deposited onto a semiconductor circuit to support etching of a trench to receive an optical coupler that performs proper impedance matching between an optical fiber and an on-circuit optical waveguide that extends part way into the transition channel. A silicon based dielectric that includes at least a portion with a refractive index substantially equal to a section of the optical fiber is deposited into the etched trench to create the optical coupler. Silicon based dielectrics with graded indices are also able to be used. Chemical mechanical polishing is used finalize preparation of the optical transition and integrated circuit.

摘要翻译： 一种光电子电路制造方法及其制造的集成电路装置。 集成电路采用集成光耦合过渡制造，以有效地将光能从光纤耦合到集成电路上的集成光波导。 特定材料的层被沉积到半导体电路上以支持蚀刻沟槽以接收光纤耦合器，该光耦合器在光纤和部分地延伸到过渡通道中的在线光波导之间执行适当的阻抗匹配。 包括折射率基本上等于光纤的一部分的至少一部分的硅基电介质被沉积到蚀刻沟槽中以产生光耦合器。 也可以使用具有分级指数的硅基电介质。 化学机械抛光用于确定光学转换和集成电路的准备。

公开(公告)号：US07738753B2

公开(公告)日：2010-06-15

申请号：US12164580

申请日：2008-06-30

申请人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

发明人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

IPC分类号： G02B6/12 ,  G02B6/10 ,  H01L21/302

CPC分类号： G02B6/30 ,  B82Y20/00 ,  G02B6/1223

摘要： An optoelectronic circuit fabrication method and integrated circuit apparatus fabricated therewith. Integrated circuits are fabricated with an integral optical coupling transition to efficiently couple optical energy from an optical fiber to an integrated optical waveguide on the integrated circuit. Layers of specific materials are deposited onto a semiconductor circuit to support etching of a trench to receive an optical coupler that performs proper impedance matching between an optical fiber and an on-circuit optical waveguide that extends part way into the transition channel. A silicon based dielectric that includes at least a portion with a refractive index substantially equal to a section of the optical fiber is deposited into the etched trench to create the optical coupler. Silicon based dielectrics with graded indices are also able to be used. Chemical mechanical polishing is used finalize preparation of the optical transition and integrated circuit.

摘要翻译： 一种光电子电路制造方法及其制造的集成电路装置。 集成电路采用集成光耦合过渡制造，以有效地将光能从光纤耦合到集成电路上的集成光波导。 特定材料的层被沉积到半导体电路上以支持蚀刻沟槽以接收光纤耦合器，该光耦合器在光纤和部分地延伸到过渡通道中的在线光波导之间执行适当的阻抗匹配。 包括折射率基本上等于光纤的一部分的至少一部分的硅基电介质被沉积到蚀刻沟槽中以产生光耦合器。 也可以使用具有分级指数的硅基电介质。 化学机械抛光用于确定光学转换和集成电路的准备。

公开(公告)号：US20130330036A1

公开(公告)日：2013-12-12

申请号：US13490043

申请日：2012-06-06

申请人： Solomon Assefa ,  Huapu Pan ,  Yurii Vlasov

发明人： Solomon Assefa ,  Huapu Pan ,  Yurii Vlasov

IPC分类号： G02B6/26

CPC分类号： G02B6/12002 ,  G02B6/14 ,  G02B2006/12123 ,  G02B2006/1215 ,  G02B2006/12195 ,  H01L31/02327

摘要： A method of exciting a selected light propagation mode in a device is disclosed. At least two light beams are propagated proximate a waveguide of the device substantially parallel to a selected surface of the waveguide. Light is transferred from the at least two beams of light into the waveguide through the selected surface to excite the selected light propagation mode in the waveguide.

摘要翻译： 公开了一种在设备中激发所选择的光传播模式的方法。 至少两个光束在基本上平行于波导的选定表面的装置的波导附近传播。 光从至少两束光束通过所选择的表面传输到波导中，以激发波导中所选择的光传播模式。

公开(公告)号：US20130330037A1

公开(公告)日：2013-12-12

申请号：US13527207

申请日：2012-06-19

申请人： Solomon Assefa ,  Huapu Pan ,  Yurii Vlasov

发明人： Solomon Assefa ,  Huapu Pan ,  Yurii Vlasov

IPC分类号： G02B6/26

CPC分类号： G02B6/12002 ,  G02B6/14 ,  G02B2006/12123 ,  G02B2006/1215 ,  G02B2006/12195 ,  H01L31/02327

摘要： A method of exciting a selected light propagation mode in a device is disclosed. At least two light beams are propagated proximate a waveguide of the device substantially parallel to a selected surface of the waveguide. Light is transferred from the at least two beams of light into the waveguide through the selected surface to excite the selected light propagation mode in the waveguide.

公开(公告)号：US08363686B2

公开(公告)日：2013-01-29

申请号：US13363995

申请日：2012-02-01

申请人： Solomon Assefa ,  William M. Green ,  Younghee Kim ,  Joris Van Campenhout ,  Yurii Vlasov

发明人： Solomon Assefa ,  William M. Green ,  Younghee Kim ,  Joris Van Campenhout ,  Yurii Vlasov

IPC分类号： H01S5/00

CPC分类号： H01L35/34 ,  G02B6/12004 ,  G02B6/1347 ,  G02B2006/12069 ,  G02F1/0147 ,  G02F1/025

摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.

摘要翻译： 电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。 此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。 因此可以控制光电子器件的温度以稳定光电器件的性能。

公开(公告)号：US20100111470A1

公开(公告)日：2010-05-06

申请号：US12265938

申请日：2008-11-06

申请人： Solomon Assefa ,  William M. Green ,  Younghee Kim ,  Joris Van Campenhout ,  Yurii Vlasov

发明人： Solomon Assefa ,  William M. Green ,  Younghee Kim ,  Joris Van Campenhout ,  Yurii Vlasov

IPC分类号： G02B6/26

CPC分类号： G02F1/3136 ,  G02F1/2257 ,  G02F2001/0151 ,  G02F2001/311

摘要： An optical switch includes a plurality of optical interferometric structures is serially connected between at least one optical input node and two optical output nodes. A primary waveguide directly connects an optical input node and a first optical output node. A complementary waveguide, which is directly connected to a second optical output node, is evanescently coupled with the primary waveguide in a pair of optically coupled sections provided in each optical interferometric structure. Each optical interferometric structure also includes a pair of decoupled sections, which includes a primary decoupled section embedding a portion of the primary waveguide and a complementary decoupled section which includes a portion of the complementary waveguide. The complementary decoupled section is embedded in a phase tuning structure that allows modulation of the phase of the optical signal passing through. The optical switch provides less insertion loss, less crosstalk, and wider bandwidth than prior art optical switches.

摘要翻译： 光开关包括多个光学干涉结构串联连接在至少一个光输入节点和两个光输出节点之间。 主波导直接连接光输入节点和第一光输出节点。 直接连接到第二光输出节点的互补波导与设置在每个光学干涉结构中的一对光耦合部分中的主波导ev逝地耦合。 每个光学干涉结构还包括一对解耦部分，其包括嵌入主波导的一部分的初级去耦部分和包括互补波导的一部分的互补去耦部分。 互补解耦部分被嵌入相位调谐结构中，允许调制通过的光信号的相位。 与现有技术的光开关相比，光开关提供较少的插入损耗，较少的串扰和更宽的带宽。

公开(公告)号：US08111724B2

公开(公告)日：2012-02-07

申请号：US12498463

申请日：2009-07-07

申请人： Solomon Assefa ,  William M. Green ,  Younghee Kim ,  Joris Van Campenhout ,  Yurii Vlasov

发明人： Solomon Assefa ,  William M. Green ,  Younghee Kim ,  Joris Van Campenhout ,  Yurii Vlasov

IPC分类号： H01S5/00

CPC分类号： H01L35/34 ,  G02B6/12004 ,  G02B6/1347 ,  G02B2006/12069 ,  G02F1/0147 ,  G02F1/025

摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.

摘要翻译： 电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。 此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。 因此可以控制光电子器件的温度以稳定光电器件的性能。

公开(公告)号：US08633067B2

公开(公告)日：2014-01-21

申请号：US12951597

申请日：2010-11-22

申请人： Solomon Assefa ,  William M. J. Green ,  Yurii A. Vlasov ,  Min Yang

发明人： Solomon Assefa ,  William M. J. Green ,  Yurii A. Vlasov ,  Min Yang

IPC分类号： H01L21/00

CPC分类号： H01L21/8238 ,  G02B6/136 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/76283 ,  H01L31/02327 ,  H01L31/103 ,  H01L31/105

摘要： Disclosed are process enhancements to fully integrate the processing of a photonics device into a CMOS manufacturing process flow. A CMOS wafer may be divided into different portions. One of the portions is for the CMOS devices and one or more other portions are for the photonics devices. The photonics devices include a ridged waveguide and a germanium photodetector. The germanium photodetector may utilize a seeded crystallization from melt process so there is more flexibility in the processing of the germanium photodetector.

摘要翻译： 公开了将光子器件的处理完全集成到CMOS制造工艺流程中的过程增强。 CMOS晶片可以被分成不同的部分。 其中一个部分用于CMOS器件，一个或多个其它部分用于光子器件。 光子器件包括脊状波导和锗光电检测器。 锗光电探测器可以利用来自熔融法的接种结晶，因此在锗光电探测器的处理中具有更大的灵活性。

公开(公告)号：US08541734B2

公开(公告)日：2013-09-24

申请号：US13603567

申请日：2012-09-05

申请人： Solomon Assefa ,  Yurii A. Vlasov ,  Fengnian Xia

发明人： Solomon Assefa ,  Yurii A. Vlasov ,  Fengnian Xia

IPC分类号： H01L31/00 ,  H01L31/107

CPC分类号： H01L31/107 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/03529 ,  Y02E10/50

摘要： A semiconductor photodetector may provide charge carrier avalanche multiplication at high field regions of a semiconductor material layer. A semiconductor current amplifier may provide current amplification by impact ionization near a high field region. A plurality of metal electrodes are formed on a surface of a semiconductor material layer and electrically biased to produce a non-uniform high electric field in which the high electric field strength accelerates avalanche electron-hole pair generation, which is employed as an effective avalanche multiplication photodetection mechanism or as an avalanche impact ionization current amplification mechanism.

公开(公告)号：US08426921B2

公开(公告)日：2013-04-23

申请号：US13019130

申请日：2011-02-01

申请人： Solomon Assefa ,  Kuan-Neng Chen ,  Steven J. Koester ,  Yuri A. Vlasov

发明人： Solomon Assefa ,  Kuan-Neng Chen ,  Steven J. Koester ,  Yuri A. Vlasov

IPC分类号： H01L27/12

CPC分类号： H01L27/0688 ,  H01L25/167 ,  H01L27/144 ,  H01L2224/83894 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2224/80896 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： Integrated circuits having complementary metal-oxide semiconductor (CMOS) and photonics circuitry and techniques for three-dimensional integration thereof are provided. In one aspect, a three-dimensional integrated circuit comprises a bottom device layer and a top device layer. The bottom device layer comprises a substrate; a digital CMOS circuitry layer adjacent to the substrate; and a first bonding oxide layer adjacent to a side of the digital CMOS circuitry layer opposite the substrate. The top device layer comprises an analog CMOS and photonics circuitry layer formed in a silicon-on-insulator (SOI) layer having a buried oxide (BOX) with a thickness of greater than or equal to about 0.5 micrometers; and a second bonding oxide layer adjacent to the analog CMOS and photonics circuitry layer. The bottom device layer is bonded to the top device layer by an oxide-to-oxide bond between the first bonding oxide layer and the second bonding oxide layer.

摘要翻译： 提供了具有互补金属氧化物半导体（CMOS）的集成电路和用于其三维集成的光子电路和技术。 一方面，三维集成电路包括底部器件层和顶部器件层。 底部器件层包括衬底; 与衬底相邻的数字CMOS电路层; 以及与数字CMOS电路层的与衬底相对的一侧相邻的第一结合氧化物层。 顶部器件层包括形成在具有大于或等于约0.5微米厚度的掩埋氧化物（BOX）的绝缘体上硅（SOI）层中的模拟CMOS和光子电路层; 以及与模拟CMOS和光子电路层相邻的第二结合氧化物层。 底部器件层通过第一接合氧化物层和第二接合氧化物层之间的氧化物 - 氧化物键接合到顶部器件层。