公开(公告)号：US08927318B2

公开(公告)日：2015-01-06

申请号：US13160067

申请日：2011-06-14

申请人： Stephen W. Bedell ,  Devendra K. Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Devendra K. Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/0216 ,  H01L21/18 ,  H01L21/02 ,  H01L21/304 ,  H01L31/0687 ,  H01L31/18

CPC分类号： H01L31/074 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/0262 ,  H01L21/304 ,  H01L31/0304 ,  H01L31/0312 ,  H01L31/0687 ,  H01L31/06875 ,  H01L31/0725 ,  H01L31/0745 ,  H01L31/075 ,  H01L31/076 ,  H01L31/1808 ,  H01L31/1852 ,  H01L31/1892 ,  Y02E10/544 ,  Y02P70/521

摘要： A method cleaving a semiconductor material that includes providing a germanium substrate having a germanium and tin alloy layer is present therein. A stressor layer is deposited on a surface of the germanium substrate. A stress from the stressor layer is applied to the germanium substrate, in which the stress cleaves the germanium substrate to provide a cleaved surface. The cleaved surface of the germanium substrate is then selective to the germanium and tin alloy layer of the germanium substrate. In another embodiment, the germanium and tin alloy layer may function as a fracture plane during a spalling method.

摘要翻译： 一种切割半导体材料的方法，其中包括提供具有锗和锡合金层的锗衬底。 应力层沉积在锗衬底的表面上。 来自应力层的应力施加到锗衬底，其中应力切割锗衬底以提供切割表面。 然后，锗衬底的切割表面对锗衬底的锗和锡合金层是选择性的。 在另一个实施例中，锗和锡合金层可以在剥落方法中用作断裂面。

公开(公告)号：US20130025653A1

公开(公告)日：2013-01-31

申请号：US13193260

申请日：2011-07-28

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/0352 ,  H01L31/18

CPC分类号： H01L31/074 ,  H01L31/02167 ,  H01L31/022466 ,  H01L31/0304 ,  H01L31/036 ,  H01L31/077 ,  H01L31/20 ,  Y02E10/50 ,  Y02E10/544 ,  Y02P70/521

摘要： Solar cell structures that have improved carrier collection efficiencies at a heterointerface are provided by low temperature epitaxial growth of silicon on a III-V base. Additionally, a solar cell structure having improved open circuit voltage includes a shallow junction III-V emitter formed by epitaxy or diffusion followed by the epitaxy of SixGe1-x passivated by amorphous SiyGe1-y:H.

摘要翻译： 通过在III-V基底上的硅的低温外延生长，提供在异质界面上提高载流子收集效率的太阳能电池结构。 此外，具有改进的开路电压的太阳能电池结构包括通过外延或扩散形成的浅结III-V发射体，随后是通过非晶SiyGe1-y：H钝化的SixGe1-x的外延。

公开(公告)号：US20120318334A1

公开(公告)日：2012-12-20

申请号：US13160067

申请日：2011-06-14

申请人： Stephen W. Bedell ,  Devendra K. Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Devendra K. Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/075 ,  H01L21/78

CPC分类号： H01L31/074 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/0262 ,  H01L21/304 ,  H01L31/0304 ,  H01L31/0312 ,  H01L31/0687 ,  H01L31/06875 ,  H01L31/0725 ,  H01L31/0745 ,  H01L31/075 ,  H01L31/076 ,  H01L31/1808 ,  H01L31/1852 ,  H01L31/1892 ,  Y02E10/544 ,  Y02P70/521

摘要： A method cleaving a semiconductor material that includes providing a germanium substrate having a germanium and tin alloy layer is present therein. A stressor layer is deposited on a surface of the germanium substrate. A stress from the stressor layer is applied to the germanium substrate, in which the stress cleaves the germanium substrate to provide a cleaved surface. The cleaved surface of the germanium substrate is then selective to the germanium and tin alloy layer of the germanium substrate. In another embodiment, the germanium and tin alloy layer may function as a fracture plane during a spalling method.

摘要翻译： 一种切割半导体材料的方法，其中包括提供具有锗和锡合金层的锗衬底。 应力层沉积在锗衬底的表面上。 来自应力层的应力施加到锗衬底，其中应力切割锗衬底以提供切割表面。 然后，锗衬底的切割表面对锗衬底的锗和锡合金层是选择性的。 在另一个实施例中，锗和锡合金层可以在剥落方法中用作断裂面。

公开(公告)号：US20120118383A1

公开(公告)日：2012-05-17

申请号：US12946216

申请日：2010-11-15

申请人： Stephen W. Bedell ,  Norma E. Sosa Cortes ,  Wilfried E. Haensch ,  Steven J. Koester ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma E. Sosa Cortes ,  Wilfried E. Haensch ,  Steven J. Koester ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L31/0264 ,  H01L31/18

CPC分类号： H01L27/142 ,  H01L31/02008 ,  H01L31/0747 ,  H01L31/075 ,  H01L31/076 ,  H01L31/078 ,  H01L31/1804 ,  H01L31/202 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： An autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.

摘要翻译： 自主集成电路（IC）包括形成在作为处理衬底的绝缘体上硅（SOI）衬底的底部衬底上的太阳能电池; 位于太阳能电池顶部的SOI衬底的绝缘层; 以及形成在位于绝缘层顶部的SOI衬底的顶部半导体层上的器件层，其中器件层的顶部接触电连接到太阳能电池的底部接触，使得太阳能电池能够通电 设备层。

公开(公告)号：US08853529B2

公开(公告)日：2014-10-07

申请号：US13568121

申请日：2012-08-06

申请人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Bahman Hekmatshoartabari ,  Ning Li ,  Devendra K. Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Bahman Hekmatshoartabari ,  Ning Li ,  Devendra K. Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/00 ,  H01L31/0687 ,  H01L31/0735 ,  H01L31/0304 ,  H01L31/18 ,  H01L21/02

CPC分类号： H01L31/06875 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02461 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02664 ,  H01L31/03042 ,  H01L31/0735 ,  H01L31/1844 ,  Y02E10/544 ,  Y02P70/521

摘要： Solar cell structures include stacked layers in reverse order on a germanium substrate wherein a n++ (In)GaAs buffer layer plays dual roles as buffer and contact layers in the inverted structures. The absorbing layers employed in such exemplary structures are III-V layers such as (In)GaAs. Controlled spalling may be employed as part of the fabrication process for the solar cell structures, which may be single or multi-junction. The requirement for etching a buffer layer is eliminated, thereby facilitating the manufacturing process of devices using the disclosed structures.

摘要翻译： 太阳能电池结构在锗衬底上以相反的顺序包括堆叠层，其中n ++（In）GaAs缓冲层在倒置结构中起缓冲层和接触层的双重作用。 在这种示例性结构中采用的吸收层是III-V层，例如（In）GaAs。 受控的剥落可以用作太阳能电池结构的制造过程的一部分，其可以是单结或多结。 消除了蚀刻缓冲层的要求，从而便于使用公开的结构的器件的制造过程。

公开(公告)号：US08748296B2

公开(公告)日：2014-06-10

申请号：US13172793

申请日：2011-06-29

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra K. Sadana ,  Davood Shahrjerdi ,  Norma E. Sosa Cortes

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra K. Sadana ,  Davood Shahrjerdi ,  Norma E. Sosa Cortes

IPC分类号： H01L21/00

CPC分类号： H01L21/304 ,  C03C15/00 ,  C03C2218/34 ,  H01L31/1892

摘要： A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.

摘要翻译： 使用边缘排除区域（其中应力层不存在（在沉积期间排除或随后除去）或存在但显着不附着于排除区域中的基底表面的边缘排除区域来最小化边缘相关底物断裂的方法 被提供。 在一个实施例中，该方法包括在基底基板的上表面和边缘附近形成边缘排除材料。 然后在基底基板的上表面和边缘排除材料的顶部的暴露部分上形成应力层，然后剥离位于应力层下方并且不被边缘排除材料覆盖的基底基板的一部分 。

公开(公告)号：US08658444B2

公开(公告)日：2014-02-25

申请号：US13472584

申请日：2012-05-16

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L21/00

CPC分类号： H01L27/1218 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1266 ,  H01L2221/68368

摘要： A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.

摘要翻译： 使用适用于柔性基板的技术制造高分辨率有源矩阵背板。 包含有源半导体器件的背板层形成在绝缘体上半导体衬底上。 背板层从基板剥离。 包括诸如LCD，OLED，感光材料或压电材料的无源器件的前端层形成在背板层上以形成有源矩阵结构。 可以制造有源矩阵结构以允许底部发射并提供机械灵活性。

公开(公告)号：US08610212B2

公开(公告)日：2013-12-17

申请号：US13526139

申请日：2012-06-18

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L27/12

CPC分类号： H01L27/1218 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1266 ,  H01L2221/68368

摘要： A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.

摘要翻译： 使用适用于柔性基板的技术制造高分辨率有源矩阵背板。 包含有源半导体器件的背板层形成在绝缘体上半导体衬底上。 背板层从基板剥离。 包括诸如LCD，OLED，感光材料或压电材料的无源器件的前端层形成在背板层上以形成有源矩阵结构。 可以制造有源矩阵结构以允许底部发射并提供机械灵活性。

公开(公告)号：US20130306971A1

公开(公告)日：2013-11-21

申请号：US13526139

申请日：2012-06-18

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L27/088 ,  H01L33/08

CPC分类号： H01L27/1218 ,  H01L21/304 ,  H01L21/6835 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1266 ,  H01L2221/68368

摘要： A high resolution active matrix backplane is fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed on a semiconductor-on-insulator substrate. The backplane layer is spalled from the substrate. A frontplane layer including passive devices such as LCDs, OLEDs, photosensitive materials, or piezo-electric materials is formed over the backplane layer to form an active matrix structure. The active matrix structure may be fabricated to allow bottom emission and provide mechanical flexibility.

公开(公告)号：US08569097B1

公开(公告)日：2013-10-29

申请号：US13543459

申请日：2012-07-06

申请人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Bahman Hekmatshoartabari ,  Ning Li ,  Devendra K. Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Bahman Hekmatshoartabari ,  Ning Li ,  Devendra K. Sadana ,  Davood Shahrjerdi

IPC分类号： H01L21/00

CPC分类号： H01L31/06875 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02461 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02664 ,  H01L31/03042 ,  H01L31/0735 ,  H01L31/1844 ,  Y02E10/544 ,  Y02P70/521

摘要： Solar cell structures include stacked layers in reverse order on a germanium substrate wherein a n++ (In)GaAs buffer layer plays dual roles as buffer and contact layers in the inverted structures. The absorbing layers employed in such exemplary structures are III-V layers such as (In)GaAs. Controlled spalling may be employed as part of the fabrication process for the solar cell structures, which may be single or multi-junction. The requirement for etching a buffer layer is eliminated, thereby facilitating the manufacturing process of devices using the disclosed structures.

摘要翻译： 太阳能电池结构在锗衬底上以相反的顺序包括堆叠层，其中n ++（In）GaAs缓冲层在倒置结构中起缓冲层和接触层的双重作用。 在这种示例性结构中采用的吸收层是III-V层，例如（In）GaAs。 受控的剥落可以用作太阳能电池结构的制造过程的一部分，其可以是单结或多结。 消除了蚀刻缓冲层的要求，从而便于使用公开的结构的器件的制造过程。