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公开(公告)号：US20100221867A1
公开(公告)日：2010-09-02
申请号：US12436249
申请日：2009-05-06
申请人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Devendra K. Sadana , Katherine L. Saenger , Ghavam G. Shahidi
发明人： Stephen W. Bedell , Joel P. de Souza , Keith E. Fogel , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Devendra K. Sadana , Katherine L. Saenger , Ghavam G. Shahidi
IPC分类号： H01L31/0376 , H01L21/762
CPC分类号： H01L31/03921 , H01L21/02529 , H01L21/02532 , H01L21/02573 , H01L21/02667 , H01L21/7624 , H01L21/76245 , H01L21/76262 , H01L31/046 , H01L31/0463 , H01L31/0465 , H01L31/1872 , Y02E10/50 , Y02P70/521
摘要： A lost cost method for fabricating SOI substrates is provided. The method includes forming a stack of p-type doped amorphous Si-containing layers on a semiconductor region of a substrate by utilizing an evaporation deposition process. A solid phase recrystallization step is then performed to convert the amorphous Si-containing layers within the stack into a stack of p-type doped single crystalline Si-containing layers. After recrystallization, the single crystalline Si-containing layers are subjected to anodization and at least an oxidation step to form an SOI substrate. Solar cells and/or other semiconductor devices can be formed on the upper surface of the inventive SOI substrate.
摘要翻译： 提供了一种用于制造SOI衬底的损耗成本方法。 该方法包括通过利用蒸发沉积工艺在衬底的半导体区域上形成一层p型掺杂的非晶态含Si层。 然后进行固相重结晶步骤，以将叠层内的非晶态含硅层转化为p型掺杂单晶含Si层的堆叠。 重结晶后，对单晶含Si层进行阳极氧化和至少氧化步骤以形成SOI衬底。 太阳能电池和/或其他半导体器件可以形成在本发明的SOI衬底的上表面上。
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公开(公告)号：US10396229B2
公开(公告)日：2019-08-27
申请号：US13103583
申请日：2011-05-09
申请人： Joel P. De Souza , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Christian Lavoie , Devendra K. Sadana , Katherine L. Saenger , Davood Shahrjerdi , Zhen Zhang
发明人： Joel P. De Souza , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Christian Lavoie , Devendra K. Sadana , Katherine L. Saenger , Davood Shahrjerdi , Zhen Zhang
IPC分类号： H01L31/07 , H01L31/0224 , H01L31/18 , H01L31/068
摘要： A solar cell having n-type and p-type interdigitated back contacts (IBCs), which cover the entire back surface of the absorber layer. The spatial separation of the IBCs is in a direction perpendicular to the back surface, thus providing borderless contacts having a zero-footprint separation. As the contacts are on the back, photons incident on the cell's front surface can be absorbed without any shadowing.
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公开(公告)号：US08878055B2
公开(公告)日：2014-11-04
申请号：US12852991
申请日：2010-08-09
申请人： Keith E. Fogel , William S. Graham , Jeehwan Kim , Harold J. Hovel , Devendra K. Sadana , Katherine L. Saenger
发明人： Keith E. Fogel , William S. Graham , Jeehwan Kim , Harold J. Hovel , Devendra K. Sadana , Katherine L. Saenger
IPC分类号： H01L31/00 , H01L31/052 , H01L31/0236 , H01L31/0352
CPC分类号： H01L31/0527 , H01L31/02366 , H01L31/03529 , H01L31/056 , Y02E10/52
摘要： A photovoltaic device and method include a substrate layer having a plurality of structures including peaks and troughs formed therein. A continuous photovoltaic stack is conformally formed over the substrate layer and extends over the peaks and troughs. The photovoltaic stack has a thickness of less than one micron and is configured to transduce incident radiation into current flow.
摘要翻译： 光电器件和方法包括具有多个结构的衬底层，包括形成在其中的峰和谷。 连续的光伏堆叠保形地形成在衬底层上并且延伸超过峰和谷。 光伏堆叠具有小于1微米的厚度，并且被配置为将入射辐射转换成电流。
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公开(公告)号：US20120031454A1
公开(公告)日：2012-02-09
申请号：US12852991
申请日：2010-08-09
IPC分类号： H01L31/042 , H01L31/18 , H01L31/04
CPC分类号： H01L31/0527 , H01L31/02366 , H01L31/03529 , H01L31/056 , Y02E10/52
摘要： A photovoltaic device and method include a substrate layer having a plurality of structures including peaks and troughs formed therein. A continuous photovoltaic stack is conformally formed over the substrate layer and extends over the peaks and troughs. The photovoltaic stack has a thickness of less than one micron and is configured to transduce incident radiation into current flow.
摘要翻译： 光电器件和方法包括具有多个结构的衬底层，包括形成在其中的峰和谷。 连续的光伏堆叠保形地形成在衬底层上并且延伸超过峰和谷。 光伏堆叠具有小于1微米的厚度，并且被配置为将入射辐射转换成电流。
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公开(公告)号：US20120031476A1
公开(公告)日：2012-02-09
申请号：US12849966
申请日：2010-08-04
申请人： Stephen W. Bedell , Harold J. Hovel , Daniel A. Inns , Jee H. Kim , Alexander Reznicek , Devendra K. Sadana
发明人： Stephen W. Bedell , Harold J. Hovel , Daniel A. Inns , Jee H. Kim , Alexander Reznicek , Devendra K. Sadana
IPC分类号： H01L31/0352 , H01L31/18
CPC分类号： H01L31/065 , H01L31/03765 , H01L31/075 , H01L31/18 , Y02E10/548
摘要： A photovoltaic device includes a composition modulated semiconductor structure including a p-doped first semiconductor material layer, a first intrinsic compositionally-graded semiconductor material layer, an intrinsic semiconductor material layer, a second intrinsic compositionally-graded semiconductor layer, and an n-doped first semiconductor material layer. The first and second intrinsic compositionally-graded semiconductor material layers include an alloy of a first semiconductor material having a greater band gap width and a second semiconductor material having a smaller band gap with, and the concentration of the second semiconductor material increases toward the intrinsic semiconductor material layer in the first and second compositionally-graded semiconductor material layers. The photovoltaic device provides an open circuit voltage comparable to that of the first semiconductor material, and a short circuit current comparable to that of the second semiconductor material, thereby increasing the efficiency of the photovoltaic device.
摘要翻译： 光伏器件包括组成调制的半导体结构，其包括p掺杂的第一半导体材料层，第一本征成分梯度半导体材料层，本征半导体材料层，第二本征组分梯度半导体层和n掺杂的第一半导体层 半导体材料层。 第一和第二本征成分梯度半导体材料层包括具有较大带隙宽度的第一半导体材料和具有较小带隙的第二半导体材料的合金，并且第二半导体材料的浓度朝向本征半导体 第一和第二组成梯度半导体材料层中的材料层。 光电器件提供与第一半导体材料相当的开路电压，以及与第二半导体材料相当的短路电流，从而提高光伏器件的效率。
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公开(公告)号：US08653360B2
公开(公告)日：2014-02-18
申请号：US12849966
申请日：2010-08-04
申请人： Stephen W. Bedell , Harold J. Hovel , Daniel A. Inns , Jee H. Kim , Alexander Reznicek , Devendra K. Sadana
发明人： Stephen W. Bedell , Harold J. Hovel , Daniel A. Inns , Jee H. Kim , Alexander Reznicek , Devendra K. Sadana
CPC分类号： H01L31/065 , H01L31/03765 , H01L31/075 , H01L31/18 , Y02E10/548
摘要： A photovoltaic device includes a composition modulated semiconductor structure including a p-doped first semiconductor material layer, a first intrinsic compositionally-graded semiconductor material layer, an intrinsic semiconductor material layer, a second intrinsic compositionally-graded semiconductor layer, and an n-doped first semiconductor material layer. The first and second intrinsic compositionally-graded semiconductor material layers include an alloy of a first semiconductor material having a greater band gap width and a second semiconductor material having a smaller band gap with, and the concentration of the second semiconductor material increases toward the intrinsic semiconductor material layer in the first and second compositionally-graded semiconductor material layers. The photovoltaic device provides an open circuit voltage comparable to that of the first semiconductor material, and a short circuit current comparable to that of the second semiconductor material, thereby increasing the efficiency of the photovoltaic device.
摘要翻译： 光伏器件包括组成调制的半导体结构，其包括p掺杂的第一半导体材料层，第一本征成分梯度半导体材料层，本征半导体材料层，第二本征组分梯度半导体层和n掺杂的第一半导体层 半导体材料层。 第一和第二本征成分梯度半导体材料层包括具有较大带隙宽度的第一半导体材料和具有较小带隙的第二半导体材料的合金，并且第二半导体材料的浓度朝向本征半导体 第一和第二组成梯度半导体材料层中的材料层。 光电器件提供与第一半导体材料相当的开路电压，以及与第二半导体材料相当的短路电流，从而提高光伏器件的效率。
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公开(公告)号：US20110212622A1
公开(公告)日：2011-09-01
申请号：US12714426
申请日：2010-02-26
申请人： Joel P. Desouza , Harold J. Hovel , Daniel Inns , Jeehwan Kim , Devendra K. Sadana , Katherine L. Saenger
发明人： Joel P. Desouza , Harold J. Hovel , Daniel Inns , Jeehwan Kim , Devendra K. Sadana , Katherine L. Saenger
IPC分类号： H01L21/311
CPC分类号： H01L31/02363 , Y02E10/50
摘要： A low cost method is described for forming a textured Si surface such as for a solar cell which includes forming a dielectric layer containing pinholes, anisotropically etching through the pinholes to form inverted pyramids in the Si surface and removing the dielectric layer thereby producing a high light trapping efficiency for incident radiation.
摘要翻译： 描述了一种用于形成纹理Si表面的低成本方法，例如用于太阳能电池，其包括形成包含针孔的电介质层，通过针孔各向异性蚀刻以在Si表面中形成倒置的金字塔并除去电介质层，从而产生高光 捕获效率的入射辐射。
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公开(公告)号：US20090217967A1
公开(公告)日：2009-09-03
申请号：US12039826
申请日：2008-02-29
IPC分类号： H01L31/042 , H01L31/00 , H01L21/02
CPC分类号： H01L31/035281 , B82Y20/00 , H01L31/022425 , H01L31/0296 , H01L31/0304 , H01L31/18 , Y02E10/544 , Y02P70/521
摘要： Embodiments of the present invention provide a solar energy converter, which includes a silicon layer having at least two regions of a first and a second conductivity type that form a P-N junction, at least a portion of the silicon layer being porous, and pores in the portion of porous silicon containing a semiconductor material, the semiconductor material being different from silicon; and a first and a second electrode being placed at a bottom and a top surface of the silicon layer respectively. Methods of manufacturing the same are also provided.
摘要翻译： 本发明的实施例提供了一种太阳能转换器，其包括具有形成PN结的至少两个第一和第二导电类型的区域的硅层，至少一部分硅层是多孔的，并且孔中的孔 含有半导体材料的多孔硅的部分，所述半导体材料与硅不同; 以及分别设置在硅层的底部和顶面的第一和第二电极。 还提供了制造方法。
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公开(公告)号：US08569803B2
公开(公告)日：2013-10-29
申请号：US13572742
申请日：2012-08-13
申请人： Christy S. Tyberg , Katherine L. Saenger , Jack O. Chu , Harold J. Hovel , Robert L. Wisnieff , Kerry Bernstein , Stephen W. Bedell
发明人： Christy S. Tyberg , Katherine L. Saenger , Jack O. Chu , Harold J. Hovel , Robert L. Wisnieff , Kerry Bernstein , Stephen W. Bedell
IPC分类号： H01L29/76
CPC分类号： H01L23/5226 , H01L23/53271 , H01L27/124 , H01L27/1248 , H01L2924/0002 , H01L2924/00
摘要： This invention provides structures and a fabrication process for incorporating thin film transistors in back end of the line (BEOL) interconnect structures. The structures and fabrication processes described are compatible with processing requirements for the BEOL interconnect structures. The structures and fabrication processes utilize existing processing steps and materials already incorporated in interconnect wiring levels in order to reduce added cost associated with incorporating thin film transistors in the these levels. The structures enable vertical (3D) integration of multiple levels with improved manufacturability and reliability as compared to prior art methods of 3D integration.
摘要翻译： 本发明提供了用于在线路后端（BEOL）互连结构中并入薄膜晶体管的结构和制造工艺。 所描述的结构和制造工艺与BEOL互连结构的处理要求相兼容。 结构和制造工艺利用已经并入到互连布线层中的现有处理步骤和材料，以便降低与在这些层级中引入薄膜晶体管相关联的附加成本。 与现有技术的3D集成方法相比，该结构能够实现多层次的垂直（3D）集成，具有改进的可制造性和可靠性。
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公开(公告)号：US08441042B2
公开(公告)日：2013-05-14
申请号：US12561827
申请日：2009-09-17
申请人： Christy S. Tyberg , Katherine L. Saenger , Jack O. Chu , Harold J. Hovel , Robert L. Wisnieff , Kerry Bernstein , Stephen W. Bedell
发明人： Christy S. Tyberg , Katherine L. Saenger , Jack O. Chu , Harold J. Hovel , Robert L. Wisnieff , Kerry Bernstein , Stephen W. Bedell
IPC分类号： H01L21/76
CPC分类号： H01L23/5226 , H01L23/53271 , H01L27/124 , H01L27/1248 , H01L2924/0002 , H01L2924/00
摘要： This invention provides structures and a fabrication process for incorporating thin film transistors in back end of the line (BEOL) interconnect structures. The structures and fabrication processes described are compatible with processing requirements for the BEOL interconnect structures. The structures and fabrication processes utilize existing processing steps and materials already incorporated in interconnect wiring levels in order to reduce added cost associated with incorporating thin film transistors in the these levels. The structures enable vertical (3D) integration of multiple levels with improved manufacturability and reliability as compared to prior art methods of 3D integration.
摘要翻译： 本发明提供了用于在线路后端（BEOL）互连结构中并入薄膜晶体管的结构和制造工艺。 所描述的结构和制造工艺与BEOL互连结构的处理要求相兼容。 结构和制造工艺利用已经并入到互连布线层中的现有处理步骤和材料，以便降低与在这些层级中引入薄膜晶体管相关联的附加成本。 与现有技术的3D集成方法相比，该结构能够实现多层次的垂直（3D）集成，具有改进的可制造性和可靠性。
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