公开(公告)号：US20120118383A1

公开(公告)日：2012-05-17

申请号：US12946216

申请日：2010-11-15

申请人： Stephen W. Bedell ,  Norma E. Sosa Cortes ,  Wilfried E. Haensch ,  Steven J. Koester ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma E. Sosa Cortes ,  Wilfried E. Haensch ,  Steven J. Koester ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L31/0264 ,  H01L31/18

CPC分类号： H01L27/142 ,  H01L31/02008 ,  H01L31/0747 ,  H01L31/075 ,  H01L31/076 ,  H01L31/078 ,  H01L31/1804 ,  H01L31/202 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

摘要： An autonomous integrated circuit (IC) includes a solar cell formed on a bottom substrate of a silicon-on-insulator (SOI) substrate as a handle substrate; an insulating layer of the SOI substrate located on top of the solar cell; and a device layer formed on a top semiconductor layer of the SOI substrate located on top of the insulating layer, wherein a top contact of the device layer is electrically connected to a bottom contact of the solar cell such that the solar cell is enabled to power the device layer.

摘要翻译： 自主集成电路（IC）包括形成在作为处理衬底的绝缘体上硅（SOI）衬底的底部衬底上的太阳能电池; 位于太阳能电池顶部的SOI衬底的绝缘层; 以及形成在位于绝缘层顶部的SOI衬底的顶部半导体层上的器件层，其中器件层的顶部接触电连接到太阳能电池的底部接触，使得太阳能电池能够通电 设备层。

公开(公告)号：US20130005116A1

公开(公告)日：2013-01-03

申请号：US13172793

申请日：2011-06-29

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra K. Sadana ,  Davood Shahrjerdi ,  Norma E. Sosa Cortes

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra K. Sadana ,  Davood Shahrjerdi ,  Norma E. Sosa Cortes

IPC分类号： H01L21/301

CPC分类号： H01L21/304 ,  C03C15/00 ,  C03C2218/34 ,  H01L31/1892

摘要： A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.

摘要翻译： 使用边缘排除区域（其中应力层不存在（在沉积期间排除或随后除去）或存在但显着不附着于排除区域中的基底表面的边缘排除区域来最小化边缘相关底物断裂的方法 被提供。 在一个实施例中，该方法包括在基底基板的上表面和边缘附近形成边缘排除材料。 然后在基底基板的上表面和边缘排除材料的顶部的暴露部分上形成应力层，然后剥离位于应力层下方并且不被边缘排除材料覆盖的基底基板的一部分 。

公开(公告)号：US08748296B2

公开(公告)日：2014-06-10

申请号：US13172793

申请日：2011-06-29

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra K. Sadana ,  Davood Shahrjerdi ,  Norma E. Sosa Cortes

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra K. Sadana ,  Davood Shahrjerdi ,  Norma E. Sosa Cortes

IPC分类号： H01L21/00

CPC分类号： H01L21/304 ,  C03C15/00 ,  C03C2218/34 ,  H01L31/1892

摘要： A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.

摘要翻译： 使用边缘排除区域（其中应力层不存在（在沉积期间排除或随后除去）或存在但显着不附着于排除区域中的基底表面的边缘排除区域来最小化边缘相关底物断裂的方法 被提供。 在一个实施例中，该方法包括在基底基板的上表面和边缘附近形成边缘排除材料。 然后在基底基板的上表面和边缘排除材料的顶部的暴露部分上形成应力层，然后剥离位于应力层下方并且不被边缘排除材料覆盖的基底基板的一部分 。

公开(公告)号：US20130126493A1

公开(公告)日：2013-05-23

申请号：US13302427

申请日：2011-11-22

申请人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Keith E. Fogel ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Norma E. Sosa Cortes ,  Ning Li ,  Ibrahim Alhomoudi

发明人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Keith E. Fogel ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Norma E. Sosa Cortes ,  Ning Li ,  Ibrahim Alhomoudi

IPC分类号： B23K26/00

CPC分类号： H01L21/268 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/50 ,  H01L21/31127 ,  H01L21/32131 ,  H01L21/6835 ,  H01L2221/68327

摘要： Laser ablation can be used to form a trench within at least a blanket layer of a stressor layer that is atop a base substrate. A non-ablated portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can also be used to form a trench within a blanket material stack including at least a plating seed layer. A stressor layer is formed on the non-ablated portions of the material stack and one portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can be further used to form a trench that extends through a blanket stressor layer and into the base substrate itself. The trench has an edge that defines the edge of the material layer region to be spalled.

公开(公告)号：US20120309269A1

公开(公告)日：2012-12-06

申请号：US13150813

申请日：2011-06-01

申请人： Maha M. Khayyat ,  Norma E. Sosa Cortes ,  Katherine L. Saenger ,  Stephen W. Bedell ,  Devendra K. Sadana

发明人： Maha M. Khayyat ,  Norma E. Sosa Cortes ,  Katherine L. Saenger ,  Stephen W. Bedell ,  Devendra K. Sadana

IPC分类号： B24B1/00

CPC分类号： H01L21/187

摘要： Method to (i) introduce additional control into a material spalling process, thus improving both the crack initiation and propagation, and (ii) increase the range of selectable spalling depths are provided. In one embodiment, the method includes providing a stressor layer on a surface of a base substrate at a first temperature which is room temperature. Next, the base substrate including the stressor layer is brought to a second temperature which is less than room temperature. The base substrate is spalled at the second temperature to form a spalled material layer. Thereafter, the spalled material layer is returned to room temperature, i.e., the first temperature.

摘要翻译： 方法：（i）对材料剥落过程引入额外的控制，从而改善裂纹的产生和传播，并提供（ii）提高选择性剥落深度的范围。 在一个实施例中，该方法包括在室温下的第一温度下在基底基板的表面上提供应力层。 接下来，包括应力层的基底衬底达到小于室温的第二温度。 基底基板在第二温度下剥离以形成剥离的材料层。 此后，剥离的材料层返回到室温，即第一温度。

公开(公告)号：US09079269B2

公开(公告)日：2015-07-14

申请号：US13302427

申请日：2011-11-22

申请人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Keith E. Fogel ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Norma E. Sosa Cortes ,  Ning Li ,  Ibrahim Alhomoudi

发明人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Keith E. Fogel ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Norma E. Sosa Cortes ,  Ning Li ,  Ibrahim Alhomoudi

IPC分类号： B23K26/00 ,  H01L21/304 ,  B23K26/06 ,  B23K26/36 ,  B23K26/40

CPC分类号： H01L21/268 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/50 ,  H01L21/31127 ,  H01L21/32131 ,  H01L21/6835 ,  H01L2221/68327

摘要： Laser ablation can be used to form a trench within at least a blanket layer of a stressor layer that is atop a base substrate. A non-ablated portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can also be used to form a trench within a blanket material stack including at least a plating seed layer. A stressor layer is formed on the non-ablated portions of the material stack and one portion of the stressor layer has an edge that defines the edge of the material layer region to be spalled. Laser ablation can be further used to form a trench that extends through a blanket stressor layer and into the base substrate itself. The trench has an edge that defines the edge of the material layer region to be spalled.

摘要翻译： 可以使用激光烧蚀在至少基底衬底顶部的应力层的至少一层覆盖层内形成沟槽。 应力层的非烧蚀部分具有限定要剥离的材料层区域的边缘的边缘。 激光烧蚀还可用于在包括至少镀覆种子层的覆盖材料堆叠内形成沟槽。 在材料堆叠的非烧蚀部分上形成应力层，应力层的一部分具有限定要剥离的材料层区域的边缘的边缘。 可以进一步使用激光烧蚀来形成延伸穿过覆盖应力层并进入基底本身的沟槽。 沟槽具有限定要剥离的材料层区域的边缘的边缘。

公开(公告)号：US20130316538A1

公开(公告)日：2013-11-28

申请号：US13478749

申请日：2012-05-23

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Augustin J. Hong ,  Ning Li ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Davood Shahrjerdi ,  Kuen-Ting Shiu

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Augustin J. Hong ,  Ning Li ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Davood Shahrjerdi ,  Kuen-Ting Shiu

IPC分类号： H01L21/304 ,  H01L21/306

CPC分类号： H01L21/304 ,  H01L31/02363 ,  Y02E10/50

摘要： The generation of surface patterns or the replication of surface patterns is achieved in the present disclosure without the need to employ an etching process. Instead, a unique fracture mode referred to as spalling is used in the present disclosure to generate or replicate surface patterns. In the case of surface pattern generation, a surface pattern is provided in a stressor layer and then spalling is performed. In the case of surface pattern replication, a surface pattern is formed within or on a surface of a base substrate, and then a stressor layer is applied. After applying the stressor layer, spalling is performed. Generation or replication of surface patterns utilizing spalling provides a low cost means for generation or replication of surface patterns.

摘要翻译： 在本公开中实现表面图案的产生或表面图案的复制，而不需要采用蚀刻工艺。 相反，在本公开中使用称为剥落的独特的断裂模式来生成或复制表面图案。 在表面图案生成的情况下，在应力层中设置表面图案，然后进行剥离。 在表面图案复制的情况下，在基底表面上或表面上形成表面图案，然后施加应力层。 施加应力层后，进行剥落。 利用剥落产生或复制表面图案为生成或复制表面图案提供了低成本的手段。

公开(公告)号：US20080258220A1

公开(公告)日：2008-10-23

申请号：US12128040

申请日：2008-05-28

申请人： Stephen W. Bedell ,  Joel P. De Souza ,  Zhibin Ren ,  Alexander Reznicek ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam Shahidi

发明人： Stephen W. Bedell ,  Joel P. De Souza ,  Zhibin Ren ,  Alexander Reznicek ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Ghavam Shahidi

IPC分类号： H01L27/12 ,  H01L21/8234

CPC分类号： H01L29/66628 ,  H01L21/26513 ,  H01L21/324 ,  H01L21/823814 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/7848 ,  H01L29/78618 ,  H01L29/78684 ,  Y10S438/909 ,  Y10S438/943

摘要： This invention teaches methods of combining ion implantation steps with in situ or ex situ heat treatments to avoid and/or minimize implant-induced amorphization (a potential problem for source/drain (S/D) regions in FETs in ultrathin silicon on insulator layers) and implant-induced plastic relaxation of strained S/D regions (a potential problem for strained channel FETs in which the channel strain is provided by embedded S/D regions lattice mismatched with an underlying substrate layer). In a first embodiment, ion implantation is combined with in situ heat treatment by performing the ion implantation at elevated temperature. In a second embodiment, ion implantation is combined with ex situ heat treatments in a “divided-dose-anneal-in-between” (DDAB) scheme that avoids the need for tooling capable of performing hot implants.

摘要翻译： 本发明教导了将离子注入步骤与原位或非原位热处理组合以避免和/或最小化植入物诱导的非晶化（对绝缘体层上的超薄硅中的FET中的源极/漏极（S / D）区域的潜在问题）的方法， 以及应变S / D区域的植入物诱导的塑性弛豫（对于其中通道应变由嵌入的S / D区域晶格与下面的基底层不匹配而提供的应变通道FET的潜在问题）。 在第一实施例中，通过在升高的温度下进行离子注入将离子注入与原位热处理组合。 在第二实施例中，离子注入与“分剂量退火中间”（DDAB）方案中的非原位热处理组合，避免了对能够进行热植入的加工的需要。

公开(公告)号：US09059073B2

公开(公告)日：2015-06-16

申请号：US13603944

申请日：2012-09-05

申请人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Devendra K. Sadana ,  Kuen-Ting Shiu ,  Norma E. Sosa Cortes

发明人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Devendra K. Sadana ,  Kuen-Ting Shiu ,  Norma E. Sosa Cortes

IPC分类号： H01L21/20 ,  H01L21/18 ,  H01L21/78 ,  H01L21/02 ,  H01L31/18

CPC分类号： H01L21/187 ,  H01L21/02002 ,  H01L21/7813 ,  H01L31/1892 ,  Y02E10/50

摘要： A method of removing a semiconductor device layer from a base substrate is provided that includes providing a crack propagation layer on an upper surface of a base substrate. A semiconductor device layer including at least one semiconductor device is formed on the crack propagation layer. Next, end portions of the crack propagation layer are etched to initiate a crack in the crack propagation layer. The etched crack propagation layer is then cleaved to provide a cleaved crack propagation layer portion to a surface of the semiconductor device layer and another cleaved crack propagation layer portion to the upper surface of the base substrate. The cleaved crack propagation layer portion is removed from the surface of the semiconductor device layer and the another cleaved crack propagation layer portion is removed from the upper surface of the base substrate.

摘要翻译： 提供从基底基板去除半导体器件层的方法，其包括在基底基板的上表面上提供裂纹扩展层。 在裂纹扩展层上形成包括至少一个半导体器件的半导体器件层。 接下来，蚀刻裂纹扩展层的端部以在裂纹扩展层中引发裂纹。 蚀刻的裂纹扩展层然后被切割，以向半导体器件层的表面和另一个裂开的裂纹扩展层部分提供切割的裂纹扩展层部分到基底衬底的上表面。 从半导体器件层的表面去除切割的裂纹扩展层部分，并从基底基板的上表面除去另一个裂开的裂纹扩展层部分。

公开(公告)号：US20120285520A1

公开(公告)日：2012-11-15

申请号：US13107371

申请日：2011-05-13

申请人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Jeehwan Kim ,  Devendra K. Sadana ,  Kuen-Ting Shiu ,  Norma E. Sosa Cortes

发明人： Stephen W. Bedell ,  Cheng-Wei Cheng ,  Jeehwan Kim ,  Devendra K. Sadana ,  Kuen-Ting Shiu ,  Norma E. Sosa Cortes

IPC分类号： H01L31/06 ,  H01L31/18

CPC分类号： H01L31/0687 ,  H01L31/18 ,  Y02E10/544

摘要： A photovoltaic device and method for fabrication include multijunction cells, each cell having a material grown independently from the other and including different band gap energies. An interface is disposed between the cells and configured to wafer bond the cells wherein the cells are configured to be adjacent without regard to lattice mismatch.

摘要翻译： 光伏器件和制造方法包括多结电池，每个电池具有彼此独立生长且包括不同带隙能量的材料。 接口设置在单元之间并被配置为晶片结合单元，其中单元被配置为相邻而不考虑晶格失配。