Multi-zone resistive heater
    1.
    发明授权

    公开(公告)号:US06423949B1

    公开(公告)日:2002-07-23

    申请号:US09314845

    申请日:1999-05-19

    IPC分类号: H05B368

    CPC分类号: H01L21/67103

    摘要: A heating apparatus including a stage comprising a surface having an area to support a wafer and a body, a shaft coupled to the stage, and a first and a second heating element. The first heating element is disposed within a first plane of the body of the stage. The second heating element is disposed within a second plane of the body of the stage at a greater distance from the surface of the stage than the first heating element. A reactor comprising a chamber, a resistive heater, a first temperature sensor, and a second temperature sensor. A resistive heating system for a chemical vapor deposition apparatus comprising a resistive heater. A method of controlling the temperature in a reactor comprising providing a resistive heater in a chamber of a reactor, measuring the temperature with at least two temperature sensors, and controlling the temperature in the reactor by regulating a power supply to the first heating element and the second heating element according to the temperature measured by the first temperature sensor and the second temperature sensor.

    Multi-zone resistive heater
    2.
    发明授权

    公开(公告)号:US06646235B2

    公开(公告)日:2003-11-11

    申请号:US10037151

    申请日:2001-10-19

    IPC分类号: H05B368

    CPC分类号: H01L21/67103

    摘要: A heating apparatus including a stage comprising a surface having an area to support a wafer and a body, a shaft coupled to the stage, and a first and a second heating element. The first heating element is disposed within a first plane of the body of the stage. The second heating element is disposed within a second plane of the body of the stage at a greater distance from the surface of the stage than the first heating element. A reactor comprising a chamber, a resistive heater, a first temperature sensor, and a second temperature sensor. A resistive heating system for a chemical vapor deposition apparatus comprising a resistive heater. A method of controlling the temperature in a reactor comprising providing a resistive heater in a chamber of a reactor, measuring the temperature with at least two temperature sensors, and controlling the temperature in the reactor by regulating a power supply to the first heating element and the second heating element according to the temperature measured by the first temperature sensor and the second temperature sensor.

    Method of forming a silicon nitride layer on a substrate
    3.
    发明授权
    Method of forming a silicon nitride layer on a substrate 失效
    在基板上形成氮化硅层的方法

    公开(公告)号:US06645884B1

    公开(公告)日:2003-11-11

    申请号:US09350810

    申请日:1999-07-09

    IPC分类号: H01L2102

    CPC分类号: C23C16/4412 C23C16/345

    摘要: The invention provides methods and apparatuses of forming a silicon nitride layer on a semiconductor wafer. A semiconductor wafer is located on a susceptor within a semiconductor processing chamber. A carrier gas, a nitrogen source gas, and a silicon source gas are introduced into the semiconductor processing chamber and a semiconductor wafer is exposed to the mixture of gases at a pressure in the chamber in the range of approximately 100 to 500 Torr.

    摘要翻译: 本发明提供了在半导体晶片上形成氮化硅层的方法和装置。 半导体晶片位于半导体处理室内的基座上。 将载气,氮源气体和硅源气体引入到半导体处理室中,并且将半导体晶片在室内的压力下暴露于大约100至500托的范围内的气体混合物。

    Method of forming a film in a chamber and positioning a substitute in a chamber
    4.
    发明授权
    Method of forming a film in a chamber and positioning a substitute in a chamber 失效
    在室中形成膜并将替代物定位在室中的方法

    公开(公告)号:US06530992B1

    公开(公告)日:2003-03-11

    申请号:US09350632

    申请日:1999-07-09

    IPC分类号: C23C1600

    CPC分类号: H01L21/67017

    摘要: Methods and apparatuses of forming a film on a substrate including introducing a pretreatment material into a processing chamber sufficient to form a film as a portion of an inner surface of the processing chamber to inhibit outgassing from that portion of the chamber, introducing a substrate into the chamber, and forming a film on the substrate.

    摘要翻译: 在基板上形成膜的方法和装置,包括将预处理材料引入到足以形成膜作为处理室的内表面的一部分的处理室中,以阻止从该室的部分排气,将基板引入到 并在衬底上形成膜。

    Valve control system for atomic layer deposition chamber
    6.
    发明授权
    Valve control system for atomic layer deposition chamber 有权
    用于原子层沉积室的阀门控制系统

    公开(公告)号:US06734020B2

    公开(公告)日:2004-05-11

    申请号:US09800881

    申请日:2001-03-07

    IPC分类号: G01N3508

    摘要: A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.

    摘要翻译: 用于半导体处理室的阀门控制系统包括系统控制计算机和与处理室相关联的多个电控阀。 该系统还包括与系统控制计算机通信并可操作地耦合到电控阀的可编程逻辑控制器。 控制阀的刷新时间可能小于10毫秒。 因此,阀门控制操作不会显着延长原子层沉积工艺中高度重复循环所需的时间。 可以通过可编程逻辑控制器的输出电源实现硬件互锁。

    Valve control system for atomic layer deposition chamber
    7.
    发明授权
    Valve control system for atomic layer deposition chamber 有权
    用于原子层沉积室的阀门控制系统

    公开(公告)号:US07201803B2

    公开(公告)日:2007-04-10

    申请号:US10731651

    申请日:2003-12-09

    IPC分类号: B05C11/00

    摘要: A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.

    摘要翻译: 用于半导体处理室的阀门控制系统包括系统控制计算机和与处理室相关联的多个电控阀。 该系统还包括与系统控制计算机通信并可操作地耦合到电控阀的可编程逻辑控制器。 控制阀的刷新时间可能小于10毫秒。 因此,阀门控制操作不会显着延长原子层沉积工艺中高度重复循环所需的时间。 可以通过可编程逻辑控制器的输出电源实现硬件互锁。

    FORMATION OF A TANTALUM-NITRIDE LAYER
    9.
    发明申请
    FORMATION OF A TANTALUM-NITRIDE LAYER 失效
    形成氮化钛层

    公开(公告)号:US20100311237A1

    公开(公告)日:2010-12-09

    申请号:US12846253

    申请日:2010-07-29

    IPC分类号: H01L21/44 H01L21/4763

    摘要: A method of forming a material on a substrate is disclosed. In one embodiment, the method includes forming a tantalum nitride layer on a substrate disposed in a plasma process chamber by sequentially exposing the substrate to a tantalum precursor and a nitrogen precursor, followed by reducing a nitrogen concentration of the tantalum nitride layer by exposing the substrate to a plasma annealing process. A metal-containing layer is subsequently deposited on the tantalum nitride layer.

    摘要翻译: 公开了一种在基片上形成材料的方法。 在一个实施例中,该方法包括在设置在等离子体处理室中的衬底上形成氮化钽层,通过将衬底顺序地暴露于钽前体和氮前体,然后通过暴露衬底来降低氮化钽层的氮浓度 等离子体退火工艺。 随后在氮化钽层上沉积含金属的层。

    Method to deposit organic grafted film on barrier layer
    10.
    发明授权
    Method to deposit organic grafted film on barrier layer 有权
    将有机接枝膜沉积在阻挡层上的方法

    公开(公告)号:US07820026B2

    公开(公告)日:2010-10-26

    申请号:US11403566

    申请日:2006-04-13

    IPC分类号: C25D5/34

    摘要: Generally, the process includes depositing a barrier layer on a feature formed in a dielectric layer, decorating the barrier layer with a metal, performing a grafting process, initiating a copper layer and then filing the feature by use of a bulk copper fill process. Copper features formed according to aspects described herein have desirable adhesion properties to a barrier layer formed on a semiconductor substrate and demonstrate enhanced electromigration and stress migration results in the fabricated devices formed on the substrate.

    摘要翻译: 通常,该方法包括在形成在电介质层中的特征上沉积阻挡层,用金属装饰阻挡层,进行接枝过程,引发铜层,然后通过使用大块铜填充工艺来填充该特征。 根据本文描述的方面形成的铜特征对于形成在半导体衬底上的阻挡层具有期望的粘合性能,并且证明在形成在衬底上的制造器件中增强的电迁移和应力迁移。