摘要:
A heating apparatus including a stage comprising a surface having an area to support a wafer and a body, a shaft coupled to the stage, and a first and a second heating element. The first heating element is disposed within a first plane of the body of the stage. The second heating element is disposed within a second plane of the body of the stage at a greater distance from the surface of the stage than the first heating element. A reactor comprising a chamber, a resistive heater, a first temperature sensor, and a second temperature sensor. A resistive heating system for a chemical vapor deposition apparatus comprising a resistive heater. A method of controlling the temperature in a reactor comprising providing a resistive heater in a chamber of a reactor, measuring the temperature with at least two temperature sensors, and controlling the temperature in the reactor by regulating a power supply to the first heating element and the second heating element according to the temperature measured by the first temperature sensor and the second temperature sensor.
摘要:
A heating apparatus including a stage comprising a surface having an area to support a wafer and a body, a shaft coupled to the stage, and a first and a second heating element. The first heating element is disposed within a first plane of the body of the stage. The second heating element is disposed within a second plane of the body of the stage at a greater distance from the surface of the stage than the first heating element. A reactor comprising a chamber, a resistive heater, a first temperature sensor, and a second temperature sensor. A resistive heating system for a chemical vapor deposition apparatus comprising a resistive heater. A method of controlling the temperature in a reactor comprising providing a resistive heater in a chamber of a reactor, measuring the temperature with at least two temperature sensors, and controlling the temperature in the reactor by regulating a power supply to the first heating element and the second heating element according to the temperature measured by the first temperature sensor and the second temperature sensor.
摘要:
The invention provides methods and apparatuses of forming a silicon nitride layer on a semiconductor wafer. A semiconductor wafer is located on a susceptor within a semiconductor processing chamber. A carrier gas, a nitrogen source gas, and a silicon source gas are introduced into the semiconductor processing chamber and a semiconductor wafer is exposed to the mixture of gases at a pressure in the chamber in the range of approximately 100 to 500 Torr.
摘要:
Methods and apparatuses of forming a film on a substrate including introducing a pretreatment material into a processing chamber sufficient to form a film as a portion of an inner surface of the processing chamber to inhibit outgassing from that portion of the chamber, introducing a substrate into the chamber, and forming a film on the substrate.
摘要:
Embodiments of the invention generally provide an electrochemical plating system. The plating system includes a substrate loading station positioned in communication with a mainframe processing platform, at least one substrate plating cell positioned on the mainframe, at least one substrate bevel cleaning cell positioned on the mainframe, and a stacked substrate annealing station positioned in communication with at least one of the mainframe and the loading station, each chamber in the stacked substrate annealing station having a heating plate, a cooling plate, and a substrate transfer robot therein.
摘要:
A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.
摘要:
A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.
摘要:
A method, a system and a computer readable medium having a set of instructions stored thereon for die-to-robot alignment for die-to-substrate bonding are described. First, a robot is aligned with a substrate to provide a pre-aligned robot. Next, a die is aligned with the pre-aligned robot to provide a robot-aligned die. Finally, the robot-aligned die is bonded to a region of the substrate. The substrate is held stationary immediately following the aligning of the robot with the substrate and at least until the robot-aligned die is bonded to the region of the substrate.
摘要:
A method of forming a material on a substrate is disclosed. In one embodiment, the method includes forming a tantalum nitride layer on a substrate disposed in a plasma process chamber by sequentially exposing the substrate to a tantalum precursor and a nitrogen precursor, followed by reducing a nitrogen concentration of the tantalum nitride layer by exposing the substrate to a plasma annealing process. A metal-containing layer is subsequently deposited on the tantalum nitride layer.
摘要:
Generally, the process includes depositing a barrier layer on a feature formed in a dielectric layer, decorating the barrier layer with a metal, performing a grafting process, initiating a copper layer and then filing the feature by use of a bulk copper fill process. Copper features formed according to aspects described herein have desirable adhesion properties to a barrier layer formed on a semiconductor substrate and demonstrate enhanced electromigration and stress migration results in the fabricated devices formed on the substrate.