Mechanism handling race conditions in FRC-enabled processors
    1.
    发明授权
    Mechanism handling race conditions in FRC-enabled processors 失效
    在启用FRC的处理器中处理竞争条件的机制

    公开(公告)号:US07194671B2

    公开(公告)日:2007-03-20

    申请号:US10039587

    申请日:2001-12-31

    IPC分类号: G01R31/28 G06F11/00

    摘要: An processor includes first and second execution cores that operate in an FRC mode, an FRC check unit to compare results from the first and second execution cores, and an error check unit to detect recoverable errors in the first and second cores. The FRC check unit temporarily stores results from the first or second core, and a timer is activated if a mismatch is detected. If the error detector detects a recoverable error before the timer interval expires, a recovery routine is activated. If the timer interval expires first, a reset routine is activated.

    摘要翻译: 处理器包括以FRC模式操作的第一和第二执行核心,用于比较来自第一和第二执行核心的结果的FRC检查单元和用于检测第一和第二核心中的可恢复错误的错误检查单元。 FRC检查单元临时存储来自第一或第二核的结果,并且如果检测到不匹配,则定时器被激活。 如果错误检测器在定时器间隔到期之前检测到可恢复的错误,则激活恢复例程。 如果定时器间隔首先到期,则复位例程被激活。

    On-die mechanism for high-reliability processor
    2.
    发明授权
    On-die mechanism for high-reliability processor 失效
    用于高可靠性处理器的裸片机构

    公开(公告)号:US07055060B2

    公开(公告)日:2006-05-30

    申请号:US10324957

    申请日:2002-12-19

    IPC分类号: G06F11/00 G06F7/02 G01R31/28

    摘要: A processor includes first and second execution cores that operate in a redundant (FRC) mode, an FRC check unit to compare results from the first and second execution cores, and an error check unit to detect recoverable errors in the first and second cores. The error detector disables the FRC checker, responsive to detection of a recoverable error. A multi-mode embodiment of the processor implements a multi-core mode in addition to the FRC mode. An arbitration unit regulates access to resources shared by the first and second execution cores in multi-core mode. The FRC checker is located proximate to the arbitration unit in the multi-mode embodiment.

    摘要翻译: 处理器包括以冗余(FRC)模式操作的第一和第二执行核心,用于比较来自第一和第二执行核心的结果的FRC检查单元和用于检测第一和第二核心中的可恢复错误的错误检查单元。 响应于检测到可恢复的错误,错误检测器禁用FRC检查器。 处理器的多模式实施例除了FRC模式之外还实现多核模式。 仲裁单元以多核心模式来管理由第一和第二执行核共享的资源的访问。 在多模式实施例中,FRC检验器位于仲裁单元附近。