LAYOUT METHOD FOR PROTEIN-PROTEIN INTERACTION NETWORKS BASED ON SEED PROTEIN
    1.
    发明申请
    LAYOUT METHOD FOR PROTEIN-PROTEIN INTERACTION NETWORKS BASED ON SEED PROTEIN 审中-公开
    基于种子蛋白的蛋白质 - 蛋白质相互作用网络的布局方法

    公开(公告)号:US20080133197A1

    公开(公告)日:2008-06-05

    申请号:US11932880

    申请日:2007-10-31

    IPC分类号: G06G7/48

    CPC分类号: G16B45/00 G16B5/00

    摘要: Provided is a layout method for protein-protein interaction networks based on a seed protein, which is for performing multiple stages of nesting centered on a node having a high degree of physical relationship, and performing multiple stages of extension and force directed placement (FDP) with respect to a final nest graph. The layout method includes the steps of: a) extracting a node list of each sub-graph constituting a protein-protein interaction network, and aligning the node list according to adjacency of nodes; b) selecting a seed protein from the aligned node list according to node priority and nest relationship with another node; c) nesting adjacent nodes centered on the selected seed protein to generate a nested node; and d) selecting an initial position of the generated nested node, placing the nodes of the nested nodes on respective division points, centered on the seed protein, and then performing layout.

    摘要翻译: 提供了一种基于种子蛋白的蛋白质 - 蛋白质相互作用网络的布局方法,其用于以具有高度物理关系的节点为中心执行多个嵌套阶段,并且执行多个延伸阶段和力定向放置(FDP) 关于最终的巢图。 布局方法包括以下步骤:a)提取构成蛋白质 - 蛋白质相互作用网络的每个子图的节点列表,并根据节点的邻接对齐该节点列表; b)根据节点优先级和与另一节点的嵌套关系从对齐的节点列表中选择种子蛋白; c)嵌套以所选种子蛋白为中心的相邻节点以产生嵌套节点; 以及d)选择生成的嵌套节点的初始位置,将嵌套节点的节点放置在以种子蛋白为中心的相应分割点上,然后执行布局。

    METHOD AND APPARATUS FOR CONTROLLING BATTERY
    2.
    发明申请
    METHOD AND APPARATUS FOR CONTROLLING BATTERY 有权
    用于控制电池的方法和装置

    公开(公告)号:US20090174410A1

    公开(公告)日:2009-07-09

    申请号:US12299592

    申请日:2007-05-04

    IPC分类号: G01R31/00

    摘要: An apparatus for controlling a battery includes a capacitor for charging a voltage when the apparatus is on and discharging a voltage when the apparatus is off, a discharging circuit for discharging the voltage charged in the capacitor; a first switching unit for connecting or disconnecting the capacitor to/from a predetermined power source for the purpose of charging of the capacitor; a second switching unit for connecting or disconnecting the capacitor to/from the discharging unit; a voltage measuring unit for measuring a voltage charged in the capacitor; and a controller for calculating a power-off duration time according to the measured voltage. This apparatus may continuously calculate a power-off duration time of a battery pack.

    摘要翻译: 一种用于控制电池的装置包括:电容器,用于在装置接通时对电压进行充电,并且在装置关闭时放电;放电电路,用于对充电电容器中的电压进行放电; 第一开关单元,用于将电容器连接到/从预定电源断开,以便为电容器充电; 第二开关单元,用于将电容器连接到/从放电单元断开; 用于测量电容器中充电的电压的电压测量单元; 以及控制器,用于根据所测量的电压来计算断电持续时间。 该装置可以连续地计算电池组的断电持续时间。

    Positive Type Dry Film Photoresist
    3.
    发明申请
    Positive Type Dry Film Photoresist 有权
    正型干膜光刻胶

    公开(公告)号:US20080090168A1

    公开(公告)日:2008-04-17

    申请号:US11791886

    申请日:2005-12-07

    IPC分类号: G03C1/52

    摘要: A positive type photoresist resin film includes a support film and a thermosetting positive type photoresist resin layer laminated over the support film. The positive type photoresist resin layer contains alkali soluble resin, a diazide based photosensitive compound and a sensitivity enhancer. The support film has a surface roughness that inhibits the formation of defect structures such as fish eye. The invention overcomes process inefficiencies and defects cause by spin coating photoresist technologies.

    摘要翻译: 正型光致抗蚀剂树脂膜包括层压在载体膜上的支撑膜和热固性正型光致抗蚀剂树脂层。 正型光致抗蚀剂树脂层含有碱溶性树脂,二叠氮类光敏化合物和灵敏度增强剂。 支撑膜具有抑制鱼眼等缺陷结构的形成的表面粗糙度。 本发明克服了通过旋涂光刻胶技术引起的工艺低效率和缺点。

    Semiconductor memory device with a column redundancy occupying a less
chip area
    4.
    发明授权
    Semiconductor memory device with a column redundancy occupying a less chip area 有权
    具有列冗余的半导体存储器件占用较少的芯片面积

    公开(公告)号:US6122194A

    公开(公告)日:2000-09-19

    申请号:US491846

    申请日:2000-01-26

    CPC分类号: G11C29/785

    摘要: A semiconductor memory device is provided which comprises a mat having a plurality of sectors for storing information of data; and a redundancy circuit for generating a plurality of redundancy selection signals to be applied in common to the sectors when the enable fuse element is open-circuited. Each of the sectors comprises a main memory cell array and the redundancy memory cell array divided into two redundant bit segments, each of which has two redundant columns of redundant memory cells. Each sector further comprises a first column selector for selecting one of the main columns of each bit segment in response to first column address signals; a second column selector for selecting one of the two redundant columns of each redundant bit segment in response to one of the first column address signals; and a third column selector for selecting one of the two bit segments in each input/output block and one of the two redundant bit segments in response to second column address signals. Furthermore, each sector has a plurality of sense amplifiers for sensing and amplifying stored data in corresponding main column and; redundant column thus selected; and a plurality of multiplexers each for receiving outputs from a first corresponding sense amplifier and from the second sense amplifier and selecting one of the outputs thus received in response to a corresponding redundancy selection signal.

    摘要翻译: 提供了一种半导体存储器件,其包括具有用于存储数据信息的多个扇区的垫; 以及冗余电路,用于在所述使能熔丝元件断开时产生要被共同施加到所述扇区的多个冗余选择信号。 每个扇区包括主存储单元阵列,并且冗余存储单元阵列被划分为两个冗余位段,每个冗余位段具有冗余存储单元的两个冗余列。 每个扇区还包括第一列选择器,用于响应于第一列地址信号选择每个位段的主列之一; 第二列选择器,用于响应于所述第一列地址信号之一来选择每个冗余位段的两个冗余列之一; 以及第三列选择器,用于响应于第二列地址信号,选择每个输入/输出块中的两个位段之一和两个冗余位段中的一个。 此外,每个扇区具有多个读出放大器,用于感测和放大相应主列中存储的数据; 选择冗余列; 以及多个多路复用器,每个用于接收来自第一对应读出放大器和第二读出放大器的输出,并且响应于相应的冗余选择信号选择如此接收的输出之一。

    Apparatus and method for controlling connection of battery packs
    5.
    发明授权
    Apparatus and method for controlling connection of battery packs 有权
    用于控制电池组连接的装置和方法

    公开(公告)号:US08933667B2

    公开(公告)日:2015-01-13

    申请号:US13533481

    申请日:2012-06-26

    摘要: Disclosed is an apparatus for controlling the connection of a plurality of battery packs including a switching unit provided on a charge/discharge path of each battery pack to selectively open and close the charge/discharge path, a first control unit provided for each battery pack to determine the state of charge (SOC) of each battery pack and control the opening/closing of the switching unit, and a second control unit to receive the determined SOC of each battery pack from the first control unit, group battery packs having a predetermined range of SOCs, select a group containing a largest number of battery packs, connect the battery packs of the selected group in parallel, charge or discharge the parallel-connected battery packs so that a difference in SOC between the parallel-connected battery packs and the non-connected battery pack falls within a predetermined range, and connect the non-connected battery pack thereto in parallel.

    摘要翻译: 公开了一种用于控制多个电池组的连接的装置,包括设置在每个电池组的充电/放电路径上的开关单元,以选择性地打开和关闭充电/放电路径,为每个电池组提供的第一控制单元 确定每个电池组的充电状态(SOC)并控制开关单元的打开/关闭;以及第二控制单元,用于从第一控制单元接收每个电池组的确定的SOC,组合具有预定范围的电池组 的SOC,选择一个包含最大数量的电池组的组,并联连接所选组的电池组,对并联电池组进行充电或放电,使并联电池组和非电池组之间的SOC差异 连接的电池组落在预定范围内,并且并联连接未连接的电池组。

    Method and apparatus for calculating power-off duration time and state of charging of battery
    6.
    发明授权
    Method and apparatus for calculating power-off duration time and state of charging of battery 有权
    计算电池关闭持续时间和充电状态的方法和装置

    公开(公告)号:US08400116B2

    公开(公告)日:2013-03-19

    申请号:US12299592

    申请日:2007-05-04

    IPC分类号: H02J7/00

    摘要: An apparatus for controlling a battery includes a capacitor for charging a voltage when the apparatus is on and discharging a voltage when the apparatus is off, a discharging circuit for discharging the voltage charged in the capacitor; a first switching unit for connecting or disconnecting the capacitor to/from a predetermined power source for the purpose of charging of the capacitor; a second switching unit for connecting or disconnecting the capacitor to/from the discharging unit; a voltage measuring unit for measuring a voltage charged in the capacitor; and a controller for calculating a power-off duration time according to the measured voltage. This apparatus may continuously calculate a power-off duration time of a battery pack.

    摘要翻译: 一种用于控制电池的装置包括:电容器,用于在装置接通时对电压进行充电,并且在装置关闭时放电;放电电路,用于对充电电容器中的电压进行放电; 第一开关单元,用于将电容器连接到/从预定电源断开,以便为电容器充电; 第二开关单元,用于将电容器连接到/从放电单元断开; 用于测量电容器中充电的电压的电压测量单元; 以及控制器,用于根据所测量的电压来计算断电持续时间。 该装置可以连续地计算电池组的断电持续时间。

    Method for protecting an over-erasure of redundant memory cells during test for high-density nonvolatile memory semiconductor devices
    7.
    发明授权
    Method for protecting an over-erasure of redundant memory cells during test for high-density nonvolatile memory semiconductor devices 有权
    用于在用于高密度非易失性存储器半导体器件的测试期间保护冗余存储器单元的过度擦除的方法

    公开(公告)号:US06407944B1

    公开(公告)日:2002-06-18

    申请号:US09533306

    申请日:2000-03-23

    IPC分类号: G11C1606

    CPC分类号: G11C16/107 G11C16/3404

    摘要: A method is disclosed for preventing over-erasure in a nonvolatile memory device having a plurality of sectors, each sector including a main field and a redundant field. The method includes the steps of programming memory cells included in the main and redundant fields, erasing the memory cells included in the main and redundant fields, and programming over-erased cells of the memory cells included in the main and redundant fields. The main and redundant fields are included in a sector.

    摘要翻译: 公开了一种用于防止具有多个扇区的非易失性存储器件中的过度擦除的方法,每个扇区包括主场和冗余场。 该方法包括以下步骤:对包括在主场和冗余场中的存储单元进行编程,擦除包括在主场和冗余场中的存储单元,以及编程包括在主场和冗余场中的存储单元的过擦除单元。 主要和冗余领域包括在一个部门。

    Nonvolatile semiconductor memory device with a level shifter circuit
    8.
    发明授权
    Nonvolatile semiconductor memory device with a level shifter circuit 有权
    具有电平转换电路的非易失性半导体存储器件

    公开(公告)号:US6101126A

    公开(公告)日:2000-08-08

    申请号:US167534

    申请日:1998-10-07

    CPC分类号: G11C16/12 G11C16/08

    摘要: A nonvolatile semiconductor device which includes a word line, a bit line, and a memory cell connected to the word line and the bit line, also has a word line driving circuit for driving the word line with a word line voltage supplied in response to a shut off signal in accordance with each mode of operation, and a circuit for generating the shut off signal during each mode of operation. The circuit generates the shut off signal which has a power supply voltage when the word line voltage is higher than the power supply voltage, and has the word line voltage when the word line voltage is less than the power supply voltage.

    摘要翻译: 包括字线,位线和连接到字线和位线的存储单元的非易失性半导体器件还具有字线驱动电路,用于驱动字线,该字线响应于供给的字线电压 根据每个操作模式切断信号,以及用于在每个操作模式期间产生关断信号的电路。 当字线电压高于电源电压时,该电路产生具有电源电压的截止信号,并且当字线电压小于电源电压时具有字线电压。

    Nonvolatile integrated circuit memory devices and methods of operating
same
    9.
    发明授权
    Nonvolatile integrated circuit memory devices and methods of operating same 有权
    非易失性集成电路存储器件及其操作方法

    公开(公告)号:US6064596A

    公开(公告)日:2000-05-16

    申请号:US213722

    申请日:1998-12-17

    IPC分类号: G11C16/02 G11C16/16 G11C16/00

    CPC分类号: G11C16/3445 G11C16/16

    摘要: An electrically erasable and programmable non-volatile semiconductor memory device and method of erasing the same device are provided. A fail bit counter is provided for the device and method. The fail bit counter counts erase fail bits during the sector erase operation. An erase control circuit selectively terminates the sector erase operation depending upon erase fail bit number.

    摘要翻译: 提供了电可擦除和可编程的非易失性半导体存储器件以及擦除相同器件的方法。 为设备和方法提供故障位计数器。 故障位计数器在扇区擦除操作期间计数擦除失败位。 擦除控制电路根据擦除失败位数选择性地终止扇区擦除操作。