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    Semiconductor devices and methods of forming the same
    6.
    发明申请
    Semiconductor devices and methods of forming the same 审中-公开
    半导体器件及其形成方法

    公开(公告)号：US20100207184A1

    公开(公告)日：2010-08-19

    申请号：US12658154

    申请日：2010-02-03

    申请人： Kihyun Kim ,  Hansoo Kim ,  Wonseok Cho ,  Jinho Kim ,  Jaehoon Jang ,  Byoungkeun Son

    发明人： Kihyun Kim ,  Hansoo Kim ,  Wonseok Cho ,  Jinho Kim ,  Jaehoon Jang ,  Byoungkeun Son

    IPC分类号： H01L29/78

    CPC分类号： H01L27/11578 ,  H01L27/11551 ,  H01L27/11556

    摘要： A semiconductor device includes insulating patterns and gate patterns alternately stacked on a substrate; an active pattern on the substrate, which extends upward along sidewalls of the insulating patterns and the gate patterns; data storage patterns interposed between the gate patterns and the active pattern; and a source/drain region disposed in the active pattern between a pair of gate patterns adjacent to each other.

    摘要翻译： 半导体器件包括交替层叠在衬底上的绝缘图案和栅极图案; 衬底上的有源图案，其沿绝缘图案和栅极图案的侧壁向上延伸; 插入在栅极图案和活动图案之间的数据存储图案; 以及设置在相互邻近的一对栅极图案之间的有源图案中的源极/漏极区域。

    Three-dimensional semiconductor memory device and method of fabricating the same
    10.
    发明授权
    Three-dimensional semiconductor memory device and method of fabricating the same 有权
    三维半导体存储器件及其制造方法

    公开(公告)号：US08383482B2

    公开(公告)日：2013-02-26

    申请号：US12662187

    申请日：2010-04-05

    申请人： Jinho Kim ,  Byoungkeun Son ,  Hansoo Kim ,  Wonjun Lee ,  Daehyun Jang

    发明人： Jinho Kim ,  Byoungkeun Son ,  Hansoo Kim ,  Wonjun Lee ,  Daehyun Jang

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11551 ,  H01L27/11556 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/42336 ,  H01L29/42352 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7827 ,  H01L29/7889 ,  H01L29/7926

    摘要： A method of fabricating a semiconductor memory device includes alternately and repeatedly stacking sacrificial layers and insulating layers on a substrate, forming an active pattern penetrating the sacrificial layers and the insulating layers, continuously patterning the insulating layers and the sacrificial layers to form a trench, removing the sacrificial layers exposed in the trench to form recess regions exposing a sidewall of the active pattern, forming an information storage layer on the substrate, forming a gate conductive layer on the information storage layer, such that the gate conductive layer fills the recess regions and defines an empty region in the trench, the empty region being surrounded by the gate conductive layer, and performing an isotropic etch process with respect to the gate conductive layer to form gate electrodes in the recess regions, such that the gate electrodes are separated from each other.

    摘要翻译： 一种制造半导体存储器件的方法包括在衬底上交替地和重复堆叠牺牲层和绝缘层，形成穿透牺牲层和绝缘层的有源图案，连续地图案化绝缘层和牺牲层以形成沟槽，去除 所述牺牲层暴露在所述沟槽中以形成露出所述有源图案的侧壁的凹陷区域，在所述衬底上形成信息存储层，在所述信息存储层上形成栅极导电层，使得所述栅极导电层填充所述凹部区域， 在沟槽中限定空区域，空区域被栅极导电层包围，并且相对于栅极导电层执行各向同性蚀刻处理，以在凹陷区域中形成栅电极，使得栅电极与每个栅电极分离 其他。