公开(公告)号：US08350622B2

公开(公告)日：2013-01-08

申请号：US12622167

申请日：2009-11-19

Applicant: Surendra Kumar ,  Tapas Nandy

Inventor： Surendra Kumar ,  Tapas Nandy

IPC: H03F3/45

CPC classification number: H03F3/45071 ,  H03F1/0266 ,  H03F3/45192 ,  H03F3/45632 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/45302 ,  H03F2203/45354 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45434 ,  H03F2203/45446 ,  H03F2203/45702

Abstract: A circuit includes a differential amplifier having a folded cascode architecture with a pair of cascode transistors. A sensing circuit senses a common mode input voltage of a differential input signal applied to the differential amplifier. A bias generator circuit generates a bias voltage for application to the pair of cascode transistors in the folded cascode architecture. The bias generator circuit is connected to an output of the sensing circuit such that the generated bias voltage has a value which is dependent on the sensed common mode input voltage. This dependence stabilizes a common mode output voltage from the differential amplifier in response to changes in the common mode input voltage.

公开(公告)号：US20110115561A1

公开(公告)日：2011-05-19

申请号：US12622167

申请日：2009-11-19

Applicant: Surendra Kumar ,  Tapas Nandy

Inventor： Surendra Kumar ,  Tapas Nandy

IPC: H03F3/45

CPC classification number: H03F3/45071 ,  H03F1/0266 ,  H03F3/45192 ,  H03F3/45632 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2203/45302 ,  H03F2203/45354 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45434 ,  H03F2203/45446 ,  H03F2203/45702

Abstract: A circuit includes a differential amplifier having a folded cascode architecture with a pair of cascode transistors. A sensing circuit senses a common mode input voltage of a differential input signal applied to the differential amplifier. A bias generator circuit generates a bias voltage for application to the pair of cascode transistors in the folded cascode architecture. The bias generator circuit is connected to an output of the sensing circuit such that the generated bias voltage has a value which is dependent on the sensed common mode input voltage. This dependence stabilizes a common mode output voltage from the differential amplifier in response to changes in the common mode input voltage.

Abstract translation: 电路包括具有折叠共源共栅结构的差分放大器和一对共源共栅晶体管。 感测电路感测施加到差分放大器的差分输入信号的共模输入电压。 偏置发生器电路在折叠共源共栅结构中产生用于施加到该对共源共栅晶体管的偏置电压。 偏置发生器电路连接到感测电路的输出，使得产生的偏置电压具有取决于感测到的共模输入电压的值。 这种依赖性响应于共模输入电压的变化而稳定来自差分放大器的共模输出电压。

公开(公告)号：US20120099832A1

公开(公告)日：2012-04-26

申请号：US12908714

申请日：2010-10-20

Applicant: Nitin Gupta ,  Tapas Nandy

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: H04N5/775 ,  H04N5/765

CPC classification number: G11B27/105 ,  H04N5/907

Abstract: A portable video player includes: a data input coupled to a memory module to store at least one video file, a video decoder coupled to the memory module via a memory interface to decode the video file, and a video interface connector to output to a display the decoded video file.

Abstract translation: 便携式视频播放器包括：耦合到存储器模块以存储至少一个视频文件的数据输入，经由存储器接口耦合到存储器模块以解码视频文件的视频解码器，以及视频接口连接器以输出到显示器 解码的视频文件。

公开(公告)号：US07436235B2

公开(公告)日：2008-10-14

申请号：US10909939

申请日：2004-08-02

Applicant: Tapas Nandy

Inventor： Tapas Nandy

IPC: G06F1/04

CPC classification number: H03K5/133 ,  H03K5/1252 ,  H04B15/04 ,  H04B2215/064 ,  H04B2215/067

Abstract: A digital clock modulator provides a smoothly modulated clock period to reduce emitted electro-magnetic radiation (EMR). The digital clock modulator includes a plurality of delay elements connected in series and receiving as an input an unmodulated clock signal. A multiplexer receives inputs from unequally spaced taps between the delay elements. A control block provides selection inputs to the multiplexer, and receives the unmodulated clock signal from the delay elements. The delay elements include a last delay element providing the unmodulated clock signal to the control block. The last delay element has a predetermined delay for ensuring that the delay elements and related signal paths are in a same stable state before control to the multiplexer changes.

Abstract translation: 数字时钟调制器提供平滑调制的时钟周期以减少发射的电磁辐射（EMR）。 数字时钟调制器包括串联连接的多个延迟元件，作为未调制的时钟信号作为输入。 多路复用器从延迟元件之间的不等间距的抽​​头接收输入。 控制块向多路复用器提供选择输入，并从延迟元件接收未调制的时钟信号。 延迟元件包括向控制块提供未调制时钟信号的最后延迟元件。 最后一个延迟元件具有预定的延迟，用于确保延迟元件和相关信号路径在对多路复用器的控制改变之前处于相同的稳定状态。

公开(公告)号：US08314633B2

公开(公告)日：2012-11-20

申请号：US12650092

申请日：2009-12-30

Applicant: Nitin Gupta ,  Tapas Nandy ,  Phalguni Bala ,  Pikul Sarkar

Inventor： Nitin Gupta ,  Tapas Nandy ,  Phalguni Bala ,  Pikul Sarkar

IPC: H03K19/003 ,  H03K19/0175

CPC classification number: H03K19/00361 ,  H03K19/018514

Abstract: Described herein are various principles for operating a transmitter circuit to reduce noise affecting a signal being generated and reducing jitter. In some embodiments, a circuit is operated in a way that switching occurs at or above a bit rate of transmission, such that at least one switch changes state at least for every bit. Operating the circuit in such a way leads to a switching rate that is above a resonant frequency of the circuit and prevents large oscillations and noise from being inserted into the signal and causing communication problems.

Abstract translation: 这里描述了用于操作发射机电路以减少影响正在产生的信号的噪声并减少抖动的各种原理。 在一些实施例中，以使得至少一个开关至少对于每一位进行改变状态的切换发生在等于或高于传输比特率的方式来操作电路。 以这种方式操作电路导致高于电路的谐振频率的开关速率，并且防止大的振荡和噪声被插入到信号中并导致通信问题。

公开(公告)号：US20120169403A1

公开(公告)日：2012-07-05

申请号：US12982583

申请日：2010-12-30

Applicant: Nitin Gupta ,  Tapas Nandy

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: G11C5/14

CPC classification number: H04L25/0272 ,  G09G2330/023 ,  G09G2370/12 ,  H04N21/43635

Abstract: A transmitter having at least one channel comprising a first differential circuit driven by a differential data signal, the first differential circuit configured to output the differential data at a first and second output and a first control circuit coupled between the first differential circuit and the first and second output, the first control circuit driven by a drive voltage.

Abstract translation: 一种具有至少一个信道的发射机，包括由差分数据信号驱动的第一差分电路，所述第一差分电路被配置为在第一和第二输出端输出差分数据，以及耦合在第一差分电路与第一和第二差分电路之间的第一控制电路， 第二输出，由驱动电压驱动的第一控制电路。

公开(公告)号：US20060202561A1

公开(公告)日：2006-09-14

申请号：US11296589

申请日：2005-12-06

Applicant: Pooja Jaisinghani ,  Tapas Nandy

Inventor： Pooja Jaisinghani ,  Tapas Nandy

IPC: B23K11/24 ,  H02B1/24

CPC classification number: G01R19/16576 ,  G01R19/16538 ,  Y10T307/735 ,  Y10T307/74

Abstract: A supply identifier takes precise decision on the range of the external supply to manage a proper internal supply to the core of the IC by controlling a regulator or a switch connected to external supply. This supply identifier defers the decision until everything that influences the decision settles after power-up, then makes a decision only once depending on the external supply range and switches itself off, keeping the decision stored, to avoid noise-induced wrong behavior and to reduce power consumption.

Abstract translation: 供应标识符通过控制调节器或连接到外部电源的开关，对外部电源的范围进行精确决策，以管理IC内核的正确内部供电。 该供应标识符会延迟决定，直到影响决定的所有内容在上电后解决，然后根据外部供电范围作出决定，并自行关闭，保持存储的决定，以避免噪声引起的错误行为并减少 能量消耗。

公开(公告)号：US06859095B2

公开(公告)日：2005-02-22

申请号：US10356650

申请日：2003-01-31

Applicant: Tapas Nandy ,  Kirtiman Singh Rathore

Inventor： Tapas Nandy ,  Kirtiman Singh Rathore

IPC: H03F3/45 ,  H03F1/02

CPC classification number: H03F3/45753

Abstract: A method for reducing offset voltage in an operational amplifier without the need for switched-capacitors, includes introducing a tapped resistor chain between the common connected terminals of the transistors of the input differential pair of the operational amplifier and connecting the tail current source/sink of the differential amplifier to a selected tap of the resistor chain. The invention further provides an improved operational amplifier in accordance with the above method.

Abstract translation: 一种用于减少运算放大器中的失调电压而不需要开关电容的方法包括在运算放大器的输入差分对的晶体管的公共连接端子之间引入分接电阻器链，并将尾电流源/ 差分放大器到电阻链的选定分接头。 本发明还提供了一种根据上述方法的改进的运算放大器。

公开(公告)号：US09890063B2

公开(公告)日：2018-02-13

申请号：US13992064

申请日：2011-03-21

Applicant: Nageswara Rao Neti ,  Tapas Nandy

Inventor： Nageswara Rao Neti ,  Tapas Nandy

IPC: C02F1/28 ,  C02F1/461

CPC classification number: C02F1/46114 ,  C02F1/283 ,  C02F2201/002 ,  C02F2201/4611 ,  C02F2201/4616 ,  C02F2201/4618 ,  C02F2209/44 ,  C02F2301/043

Abstract: The present invention relates to provide a carbon bed electrolyzer (CBE) unit for electrochemical treatment. More particularly the present invention relates to the treatment of recalcitrant wastewater, e.g. from chemical industry. Further the said CBE unit is useful for electrolytic treatment of liquid effluent having very high concentrations of Chemical oxygen Demand (COD), Total Kjeldahl Nitrogen (TKN) and Biochemical Oxygen Demand (BOD), and Total Dissolved Solids (TDS), and for improving biodegradability of the effluent. More particularly, the present invention relates to an electro oxidation process wherein the carbon bed gets regenerated in-situ continuously.

公开(公告)号：US07382064B2

公开(公告)日：2008-06-03

申请号：US11296589

申请日：2005-12-06

Applicant: Pooja Jaisinghani ,  Tapas Nandy

Inventor： Pooja Jaisinghani ,  Tapas Nandy

IPC: H02J1/00

CPC classification number: G01R19/16576 ,  G01R19/16538 ,  Y10T307/735 ,  Y10T307/74

Abstract: A supply identifier takes precise decision on the range of the external supply to manage a proper internal supply to the core of the IC by controlling a regulator or a switch connected to external supply. This supply identifier defers the decision until everything that influences the decision settles after power-up, then makes a decision only once depending on the external supply range and switches itself off, keeping the decision stored, to avoid noise-induced wrong behavior and to reduce power consumption.

Abstract translation: 供应标识符通过控制调节器或连接到外部电源的开关，对外部电源的范围进行精确决策，以管理IC内核的正确内部供电。 该供应标识符会延迟决定，直到影响决定的所有内容在上电后解决，然后根据外部供电范围作出决定，并自行关闭，保持存储的决定，以避免噪声引起的错误行为并减少 能量消耗。