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公开(公告)号：US20110273855A1
公开(公告)日：2011-11-10
申请号：US12776888
申请日：2010-05-10
申请人： Tae Hong Kim , Sang Y. Lee , Nam H. Pham
发明人： Tae Hong Kim , Sang Y. Lee , Nam H. Pham
CPC分类号： H05K3/40 , H01L2224/16225 , H01L2924/19105 , H05K1/0265 , H05K1/115 , H05K2201/09854 , Y10T29/49155 , Y10T29/49165
摘要： A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.
摘要翻译： 用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。 导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。 通孔可以电连接第一和第二导电层。 通孔可以具有至少三个部分重叠形状的横截面。 每个形状部分地与至少两个其他形状重叠。 形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。
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公开(公告)号：US08488329B2
公开(公告)日：2013-07-16
申请号：US12776888
申请日：2010-05-10
申请人： Tae H. Kim , Sang Y. Lee , Nam H. Pham
发明人： Tae H. Kim , Sang Y. Lee , Nam H. Pham
CPC分类号： H05K3/40 , H01L2224/16225 , H01L2924/19105 , H05K1/0265 , H05K1/115 , H05K2201/09854 , Y10T29/49155 , Y10T29/49165
摘要： A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.
摘要翻译： 用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。 导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。 通孔可以电连接第一和第二导电层。 通孔可以具有至少三个部分重叠形状的横截面。 每个形状部分地与至少两个其他形状重叠。 形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。
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公开(公告)号：US08901946B2
公开(公告)日：2014-12-02
申请号：US12785572
申请日：2010-05-24
CPC分类号： G01R31/2813 , G01R31/2815
摘要： Apparatus and methods for identifying a signal on a printed circuit board (‘PCB’) under test, including an integrated circuit mounted on the PCB, the integrated circuit having a test signal generator that transmits a test signal to an output pin of the integrated circuit, with the output pin connected to a test point on the PCB; the integrated circuit also having signal identification logic that inserts into the test signal, an identifier of the signal; a test probe in contact with the test point; and a signal-identifying controller that receives the test signal and the identifier from the test probe and displays, in dependence upon the identifier, the identity of the signal.
摘要翻译： 用于识别被测PCB板上的信号的装置和方法，包括安装在PCB上的集成电路，该集成电路具有测试信号发生器，该测试信号发生器将测试信号发送到集成电路的输出引脚 ，输出引脚连接到PCB上的测试点; 该集成电路还具有插入到测试信号中的信号识别逻辑，该信号的标识符; 与测试点接触的测试探针; 以及信号识别控制器，其从测试探针接收测试信号和标识符，并根据标识符显示信号的身份。
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公开(公告)号：US08456928B2
公开(公告)日：2013-06-04
申请号：US12785697
申请日：2010-05-24
IPC分类号： G11C5/14
摘要： A method provides improved signal quality in a computer memory system. In one embodiment, a digital signal is generated having a voltage interpreted with respect to a reference voltage. The reference voltage is dynamically adjusted as a function of the traffic intensity at which the digital signal is directed to a particular receiver. A training phase may be performed for each DIMM of the memory system, to construct a lookup table correlating suitable reference voltages with different traffic intensities. The lookup table may be referenced during a subsequent execution phase, to dynamically select a reference voltage according to changing traffic intensity. The dynamically selected reference voltage value may be enforced by using transistors to selectively recruit resistors of a resistor network.
摘要翻译： 一种方法在计算机存储系统中提供改进的信号质量。 在一个实施例中，产生具有相对于参考电压解释的电压的数字信号。 作为数字信号被引导到特定接收机的业务强度的函数来动态地调整参考电压。 可以对存储器系统的每个DIMM执行训练阶段，以构建将适当的参考电压与不同的交通强度相关联的查找表。 可以在随后的执行阶段期间参考查找表，以根据变化的业务强度来动态地选择参考电压。 可以通过使用晶体管来选择性地招募电阻器网络的电阻器来实施动态选择的参考电压值。
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公开(公告)号：US20110279138A1
公开(公告)日：2011-11-17
申请号：US12780333
申请日：2010-05-14
IPC分类号： G01R31/02 , G01R31/304
CPC分类号： G01R31/2843 , G01R31/2806 , G01R31/2834 , G01R31/2839 , G01R31/3025
摘要： Identifying a signal on a printed circuit board (‘PCB’) under test, including a test probe with a radio transmitter and transmitter antenna, the test probe positioned with the transmitter antenna at a test point on the PCB, the test probe transmitting a radio signal; at least two radio receivers, each receiver having a receiver antenna, each receiver antenna positioned at predetermined, separate physical locations with respect to the PCB, the receivers coupled to at least one signal strength meter, each receiver receiving the transmitted radio signal; and a signal-identifying controller connected to the signal strength meter, the signal-identifying controller reading, from the signal strength meter, signal strengths of the transmitted radio signal as received at the radio receivers; determining, in dependence upon the read signal strengths, a test signal identifier; and displaying the test signal identifier.
摘要翻译： 识别在被测试的印刷电路板（“PCB”）上的信号，包括带有无线电发射机和发射机天线的测试探头，测试探头定位在发射机天线位于PCB的测试点，测试探头发射无线电 信号; 至少两个无线电接收机，每个接收机具有接收机天线，每个接收机天线相对于所述PCB定位在预定的分离的物理位置，所述接收机耦合到至少一个信号强度计，每个接收机接收所传输的无线电信号; 信号识别控制器，连接到信号强度计，信号识别控制器从信号强度计读取在无线电接收机处接收的发射的无线电信号的信号强度; 根据读取的信号强度来确定测试信号标识符; 并显示测试信号标识符。
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公开(公告)号：US07739562B2
公开(公告)日：2010-06-15
申请号：US11840481
申请日：2007-08-17
IPC分类号： G01C29/00
CPC分类号： G06F11/2733 , G11C5/04 , G11C29/02 , G11C29/022 , G11C29/16 , G11C29/56 , G11C2029/5602
摘要： A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.
摘要翻译： 可编程诊断内存模块提供了内存控制器和内存子系统设计的增强的可测试性。 可编程诊断存储器模块包括用于与外部诊断系统通信的接口，并且该接口用于将命令传送到存储器模块以改变存储器模块的各种行为。 改变的行为可能是改变被写入存储器模块的数据流，以模拟错误，改变存储器模块信号的定时和/或加载，下载由存储器模块内的处理器核心执行的程序，改变驱动器的输出强度 存储器模块的信号和在模拟域中的操作，在存储器模块的端子处发出信号，例如在与存储器模块的电源连接上注入噪声。 存储器模块可以模拟多个可选择的存储器模块类型，并且可以包括完整的存储阵列以提供标准存储器模块操作。
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公开(公告)号：US07533458B1
公开(公告)日：2009-05-19
申请号：US12174810
申请日：2008-07-17
申请人： Moises Cases , Bradley D. Herrman , Kent B. Howieson , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham , Caleb J. Wesley
发明人： Moises Cases , Bradley D. Herrman , Kent B. Howieson , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham , Caleb J. Wesley
IPC分类号： H05K3/36
CPC分类号： H05K1/024 , H05K3/4611 , H05K3/4697 , H05K2201/09236 , H05K2201/09318 , H05K2203/063 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49158 , Y10T29/49165 , Y10T156/1013
摘要： Methods and systems for reducing noise coupling in high-speed digital systems. Exemplary embodiments include a method, including etching a plurality of high speed signal traces onto a core insulating layer, forming trenches on respective sides of the plurality of high speed signal traces, thereby removing insulating material adjacent to the plurality of high speed signal traces and forming pedestals having remaining insulating material, the plurality of high speed signal traces disposed on and coupled to the remaining insulating material, coupling pre-preg material on the high speed signal traces, removing the pre-preg material adjacent the trenches, thereby retaining the pre-preg material aligned with the high speed signal traces, and heating and pressing a core layer to the pre-preg layer, and heating and pressing the pre-preg layer to the core insulating layer.
摘要翻译： 降低高速数字系统噪声耦合的方法和系统。 示例性实施例包括一种方法，包括将多个高速信号迹线蚀刻到芯绝缘层上，在多个高速信号迹线的相应侧上形成沟槽，从而去除与多个高速信号迹线相邻的绝缘材料，并形成 具有剩余绝缘材料的基座，多个高速信号迹线设置在剩余绝缘材料上并耦合到剩余的绝缘材料上，将高速信号迹线上的预预处理材料耦合，去除与沟槽相邻的预浸料， 将材料与高速信号迹线对准，并且将芯层加热并压制到预浸层，以及将预浸层加热和压制到芯绝缘层。
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8.发明申请Providing A Duplicate Test Signal Of An Output Signal Under Test In An Integrated Circuit 审中-公开在集成电路中提供待测输出信号的重复测试信号公开(公告)号：US20090090908A1
公开(公告)日：2009-04-09
申请号：US11868071
申请日：2007-10-05
申请人： Moises Cases , Bhyrav M. Mutnury , Nam H. Pham
发明人： Moises Cases , Bhyrav M. Mutnury , Nam H. Pham
IPC分类号： G01R31/02
CPC分类号： G01R31/31707 , G01R31/31712 , G01R31/3172
摘要： Providing a duplicate test signal of an output signal under test in an integrated circuit including selecting through a multiplexer an output signal under test, the output signal under test selected from a plurality of output signals of the integrated circuit; providing through the multiplexer a duplicate signal of the selected output signal under test; adding a high impedance load on the duplicate signal thereby reducing the amplitude of the duplicate signal; and amplifying the reduced duplicate signal thereby creating the duplicate test signal.
摘要翻译： 在集成电路中提供待测输出信号的重复测试信号，包括通过多路复用器选择被测输出信号，从集成电路的多个输出信号中选择的待测输出信号; 通过多路复用器提供被测输出信号的重复信号; 在重复信号上增加高阻抗负载，从而减小重复信号的幅度; 并放大缩小的重复信号从而产生重复测试信号。
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9.发明申请SELF-HEALING NOISE DISPERSION SYSTEM FOR HIGH PERFORMANCE MULTIDROP SYSTEMS 审中-公开用于高性能多系统的自我健康噪声分散系统公开(公告)号：US20090019204A1
公开(公告)日：2009-01-15
申请号：US11777307
申请日：2007-07-13
CPC分类号： G06F13/4086 , G06F13/4243
摘要： The key limiter in a multi-drop system, such as a multi-drop memory system, is the super-positioning of reflection noise from multiple modules or pluggable units, such as DIMMs. Using the noise cancellation approach of the present invention, the noise is distributed across the width of the pulse thus significantly reducing the impact of noise super-positioning. Use of the system of the present invention provides improved noise margins and is a key enabler of high performance, high speed bus, particularly at higher bit rates, as well as an enabler for higher capacity modules, such as DIMMs. The system provides for electrical traces from each of the modules of varying lengths thereby distributing the noise reflections.
摘要翻译： 多点系统中的关键限制器（如多点存储器系统）是来自多个模块或可插拔单元（如DIMM）的反射噪声的超定位。 使用本发明的噪声消除方法，噪声分布在脉冲的宽度上，从而显着地减少噪声超定位的影响。 使用本发明的系统提供改进的噪声容限，并且是高性能，高速总线，特别是在较高比特率下的关键推动因素，以及用于诸如DIMM的更高容量模块的推动者。 该系统提供来自不同长度的每个模块的电迹线，从而分配噪声反射。
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10.发明申请APPARATUS, SYSTEM, AND METHOD FOR DYNAMIC PHASE EQUALIZATION IN A COMMUNICATION CHANNEL 有权用于通信信道中动态相位均衡的装置，系统和方法公开(公告)号：US20080112503A1
公开(公告)日：2008-05-15
申请号：US11560257
申请日：2006-11-15
申请人： Daniel N. De Araujo , Moises Cases , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Daniel N. De Araujo , Moises Cases , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H04L25/03
CPC分类号： H04L25/0264 , H04L25/0286
摘要： An apparatus, system, and method are disclosed for dynamic phase equalization in a communication channel. A transmitter history module stores a plurality of bits from a data stream that is transmitted through the communication channel. A transmitter detection module detects a pre-transition bit of a first value that is preceded in the data stream by at least one bit of the first value and followed by a transition bit with a second value. A driver module transmits the data stream by driving the communication channel. A transition module pre-drives the communication channel to the second voltage of the transition bit during a bit time interval of the pre-transition bit.
摘要翻译： 公开了用于通信信道中的动态相位均衡的装置，系统和方法。 发射机历史模块从通过通信信道发送的数据流存储多个比特。 发射机检测模块检测在数据流中前面的第一值的前转换比特的第一值的至少一个比特，然后跟随具有第二值的转换比特。 驾驶员模块通过驱动通信信道来发送数据流。 转换模块在预转换位的位时间间隔期间将通信通道预驱动到转换位的第二电压。
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