公开(公告)号：US08816944B2

公开(公告)日：2014-08-26

申请号：US11453529

申请日：2006-06-15

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

IPC分类号： G09G3/30

CPC分类号： G09G3/3283 ,  G09G3/2014 ,  G09G3/3216 ,  G09G2320/0233

摘要： A display device, which includes a plurality of pixels; a data driver for outputting data signals to the pixels; a bias current outputting unit for outputting a bias current having a predetermined magnitude; a plurality of driving current outputting units for outputting driving currents to the pixels; and a first switch connected between the bias current outputting unit and the driving current outputting units for selecting one of the driving current outputting units to connect to the bias current outputting unit, wherein the magnitudes of the driving currents are substantially the same as a magnitude of the bias current.

摘要翻译： 一种显示装置，包括多个像素; 用于将数据信号输出到像素的数据驱动器; 偏置电流输出单元，用于输出具有预定大小的偏置电流; 多个驱动电流输出单元，用于向像素输出驱动电流; 以及第一开关，连接在所述偏置电流输出单元和所述驱动电流输出单元之间，用于选择所述驱动电流输出单元中的一个连接到所述偏置电流输出单元，其中所述驱动电流的大小基本上与 偏置电流。

公开(公告)号：US07706159B2

公开(公告)日：2010-04-27

申请号：US11442451

申请日：2006-05-26

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

IPC分类号： G05F1/10

CPC分类号： H02M3/073

摘要： A charge pump for a DC-DC converter includes an input terminal receiving an input voltage, an output terminal outputting an output voltage, a plurality of charge pumping stages connected in series between the input terminal and the output terminal, and a voltage level shifter shifting voltage levels of first and second gate clock signals so that received first and second gate clock signals have a predetermined amplitude. Therefore, the charge pump can increase power efficiency by maximizing a magnitude of VGS. A DC-DC converter using the charge pump can also be applied to a portable device, for minimizing power consumption, and a method for improving power efficiency of the DC-DC converter is provided.

摘要翻译： 用于DC-DC转换器的电荷泵包括接收输入电压的输入端子，输出输出电压的输出端子，串联连接在输入端子和输出端子之间的多个电荷泵浦级，以及电压电平转换器 第一和第二栅极时钟信号的电压电平，使得接收的第一和第二栅极时钟信号具有预定的幅度。 因此，电荷泵可以通过使VGS的幅度最大化来提高功率效率。 使用电荷泵的DC-DC转换器也可以应用于便携式设备，以最小化功耗，并且提供了一种用于提高DC-DC转换器的功率效率的方法。

公开(公告)号：US20060290615A1

公开(公告)日：2006-12-28

申请号：US11453529

申请日：2006-06-15

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

IPC分类号： G09G3/30

CPC分类号： G09G3/3283 ,  G09G3/2014 ,  G09G3/3216 ,  G09G2320/0233

摘要： A display device, which includes a plurality of pixels; a data driver for outputting data signals to the pixels; a bias current outputting unit for outputting a bias current having a predetermined magnitude; a plurality of driving current outputting units for outputting driving currents to the pixels; and a first switch connected between the bias current outputting unit and the driving current outputting units for selecting one of the driving current outputting units to connect to the bias current outputting unit, wherein the magnitudes of the driving currents are substantially the same as a magnitude of the bias current.

摘要翻译： 一种显示装置，包括多个像素; 用于将数据信号输出到像素的数据驱动器; 偏置电流输出单元，用于输出具有预定大小的偏置电流; 多个驱动电流输出单元，用于向像素输出驱动电流; 以及第一开关，连接在所述偏置电流输出单元和所述驱动电流输出单元之间，用于选择所述驱动电流输出单元中的一个连接到所述偏置电流输出单元，其中所述驱动电流的大小基本上与 偏置电流。

公开(公告)号：US20060279352A1

公开(公告)日：2006-12-14

申请号：US11442451

申请日：2006-05-26

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Hong-Jae Shin

IPC分类号： G05F1/10 ,  H02M3/18

CPC分类号： H02M3/073

摘要： A charge pump for a DC-DC converter includes an input terminal receiving an input voltage, an output terminal outputting an output voltage, a plurality of charge pumping stages connected in series between the input terminal and the output terminal, and a voltage level shifter shifting voltage levels of first and second gate clock signals so that received first and second gate clock signals have a predetermined amplitude. Therefore, the charge pump can increase power efficiency by maximizing a magnitude of VGS. A DC-DC converter using the charge pump can also be applied to a portable device, for minimizing power consumption, and a method for improving power efficiency of the DC-DC converter is provided.

摘要翻译： 用于DC-DC转换器的电荷泵包括接收输入电压的输入端子，输出输出电压的输出端子，串联连接在输入端子和输出端子之间的多个电荷泵浦级，以及电压电平转换器 第一和第二栅极时钟信号的电压电平，使得接收的第一和第二栅极时钟信号具有预定的幅度。 因此，电荷泵可以通过使V GS的大小最大化来提高功率效率。 使用电荷泵的DC-DC转换器也可以应用于便携式设备，以最小化功耗，并且提供了一种用于提高DC-DC转换器的功率效率的方法。

公开(公告)号：US20110069555A1

公开(公告)日：2011-03-24

申请号：US12955984

申请日：2010-11-30

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Sang-Su Park

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Sang-Su Park

IPC分类号： G11C16/26 ,  G11C16/10

CPC分类号： H01L29/7887 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7923

摘要： A non-volatile memory device includes a semiconductor substrate, first and second control gates, and first and second charge storage patterns. The semiconductor substrate includes a protruding active pin having a source region, a drain region and a channel region located between the source and drain regions. The first control gate is located on a first sidewall of the channel region, and the second control gate is located on a second sidewall of the channel region. The second control gate is separated from the first control gate. The first charge storage pattern is located between the first sidewall and the first control gate, and the second charge storage pattern is located between the second sidewall and the second control gate.

摘要翻译： 非易失性存储器件包括半导体衬底，第一和第二控制栅极以及第一和第二电荷存储模式。 半导体衬底包括具有源极区，漏极区和位于源极和漏极区之间的沟道区的突出的有源管脚。 第一控制栅极位于沟道区的第一侧壁上，第二控制栅位于沟道区的第二侧壁上。 第二控制栅极与第一控制栅极分离。 第一电荷存储图案位于第一侧壁和第一控制栅极之间，第二电荷存储图案位于第二侧壁和第二控制栅极之间。

公开(公告)号：US20090108327A1

公开(公告)日：2009-04-30

申请号：US12289300

申请日：2008-10-24

申请人： Tae-Whan Kim ,  Kyeong-Rock Kim ,  Kae-Dal Kwack

发明人： Tae-Whan Kim ,  Kyeong-Rock Kim ,  Kae-Dal Kwack

IPC分类号： H01L29/788

CPC分类号： H01L29/42324 ,  H01L27/11519 ,  H01L29/40114 ,  H01L29/66825

摘要： Provided may be a gate pattern, flash memory and methods of manufacturing and operating the same. A gate pattern may include a floating gate on a tunneling dielectric layer, an inter-gate dielectric layer on the floating gate, a first control gate on the inter-gate dielectric layer, and a second control gate on the inter-gate dielectric layer and spaced apart from the first control gate. Each of the control gates sets four states according to an application time of a program voltage applied to the control gates. Thus, one control gate may program 2-bit data.

摘要翻译： 提供可以是栅极图案，闪存及其制造和操作方法。 栅极图案可以包括隧道电介质层上的浮动栅极，浮置栅极上的栅极间介电层，栅极间电介质层上的第一控制栅极和栅极间电介质层上的第二控制栅极，以及 与第一控制门间隔开。 每个控制门根据施加到控制门的编程电压的施加时间来设置四个状态。 因此，一个控制门可以编程2位数据。

公开(公告)号：US07927951B2

公开(公告)日：2011-04-19

申请号：US12955984

申请日：2010-11-30

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Sang-Su Park

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Sang-Su Park

IPC分类号： H01L21/336 ,  H01L29/788

CPC分类号： H01L29/7887 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7923

摘要： A non-volatile memory device includes a semiconductor substrate, first and second control gates, and first and second charge storage patterns. The semiconductor substrate includes a protruding active pin having a source region, a drain region and a channel region located between the source and drain regions. The first control gate is located on a first sidewall of the channel region, and the second control gate is located on a second sidewall of the channel region. The second control gate is separated from the first control gate. The first charge storage pattern is located between the first sidewall and the first control gate, and the second charge storage pattern is located between the second sidewall and the second control gate.

摘要翻译： 非易失性存储器件包括半导体衬底，第一和第二控制栅极以及第一和第二电荷存储模式。 半导体衬底包括具有源极区，漏极区和位于源极和漏极区之间的沟道区的突出的有源管脚。 第一控制栅极位于沟道区的第一侧壁上，第二控制栅位于沟道区的第二侧壁上。 第二控制栅极与第一控制栅极分离。 第一电荷存储图案位于第一侧壁和第一控制栅极之间，第二电荷存储图案位于第二侧壁和第二控制栅极之间。

公开(公告)号：US07863673B2

公开(公告)日：2011-01-04

申请号：US12370792

申请日：2009-02-13

申请人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Sang-Su Park

发明人： Tae-Whan Kim ,  Kae-Dal Kwack ,  Sang-Su Park

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/7887 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7923

摘要： A non-volatile memory device includes a semiconductor substrate, first and second control gates, and first and second charge storage patterns. The semiconductor substrate includes a protruding active pin having a source region, a drain region and a channel region located between the source and drain regions. The first control gate is located on a first sidewall of the channel region, and the second control gate is located on a second sidewall of the channel region. The second second control gate is separated from the first control gate. The first charge storage pattern is located between the first sidewall and the first control gate, and the second charge storage pattern is located between the second sidewall and the second control gate.

摘要翻译： 非易失性存储器件包括半导体衬底，第一和第二控制栅极以及第一和第二电荷存储模式。 半导体衬底包括具有源极区，漏极区和位于源极和漏极区之间的沟道区的突出的有源管脚。 第一控制栅极位于沟道区的第一侧壁上，第二控制栅位于沟道区的第二侧壁上。 第二第二控制栅极与第一控制栅极分离。 第一电荷存储图案位于第一侧壁和第一控制栅极之间，第二电荷存储图案位于第二侧壁和第二控制栅极之间。

公开(公告)号：US08735895B2

公开(公告)日：2014-05-27

申请号：US12902783

申请日：2010-10-12

申请人： Tae-Whan Kim ,  Won-il Park ,  Dong-Ick Son ,  Jae-Ho Shim ,  Jung-Min Lee ,  Jae-Hun Jung

发明人： Tae-Whan Kim ,  Won-il Park ,  Dong-Ick Son ,  Jae-Ho Shim ,  Jung-Min Lee ,  Jae-Hun Jung

IPC分类号： H01L29/10

CPC分类号： H01L29/78684 ,  H01L51/0045 ,  H01L51/0529 ,  H01L51/0591

摘要： Provided are an electronic device and methods of fabricating the same, the electronic device include a device-substrate, a stacked structure, and an electrode. The stacked structure includes a graphene thin film between a first insulator and a second insulator. The electrode is disposed over the stacked structure.

摘要翻译： 提供一种电子器件及其制造方法，电子器件包括器件衬底，堆叠结构和电极。 层叠结构包括在第一绝缘体和第二绝缘体之间的石墨烯薄膜。 电极设置在层叠结构之上。

公开(公告)号：US20120097232A1

公开(公告)日：2012-04-26

申请号：US13382134

申请日：2010-07-06

申请人： Tae-Whan Kim ,  Joo-Hyung You ,  Jae-Hun Jung ,  Jae-Seok Yi ,  Won-Il Park

发明人： Tae-Whan Kim ,  Joo-Hyung You ,  Jae-Hun Jung ,  Jae-Seok Yi ,  Won-Il Park

IPC分类号： H01L31/075 ,  B82Y99/00

CPC分类号： H01L31/03529 ,  H01L31/035281 ,  Y02E10/50

摘要： A solar cell using a p-i-n nanowire that may generate light by absorbing solar light in a wide wavelength region efficiently without generating light loss and may be manufactured with a simplified process and low cost. The solar cell includes: a semiconductor layer formed of a semiconductor material; and a photoelectromotive layer including a semiconductor structure including a core-nanowire that extends long in an upward direction of the semiconductor layer and is formed of an intrinsic semiconductor material, and a shell-nanowire that is formed to surround a periphery of the core-nanowire and is formed of a semiconductor material, wherein the semiconductor material that is used for forming the semiconductor layer includes an n-type semiconductor material, or the semiconductor material that is used for forming the shell-nanowire includes a p-type semiconductor material, and the semiconductor material that is used for forming the semiconductor layer includes a p-type semiconductor material, and the semiconductor material that is used for forming the shell-nanowire includes an n-type semiconductor material.

摘要翻译： 使用p-i-n纳米线的太阳能电池，其可以通过在宽波长区域中有效吸收太阳光而不产生光损耗而产生光，并且可以以简化的工艺和低成本制造。 太阳能电池包括：由半导体材料形成的半导体层; 以及包含半导体结构的光电动势层，所述半导体结构包括在所述半导体层的向上方向上延伸并且由本征半导体材料形成的核 - 纳米线，并且形成为包围所述核 - 纳米线的周围的壳 - 纳米线 并且由半导体材料形成，其中用于形成半导体层的半导体材料包括n型半导体材料或用于形成壳 - 纳米线的半导体材料包括p型半导体材料，以及 用于形成半导体层的半导体材料包括p型半导体材料，用于形成壳 - 纳米线的半导体材料包括n型半导体材料。