公开(公告)号：US20180026049A1

公开(公告)日：2018-01-25

申请号：US15706861

申请日：2017-09-18

申请人： TaeHee Lee ,  Kyoung-Hoon Kim ,  Hongsoo Kim

发明人： TaeHee Lee ,  Kyoung-Hoon Kim ,  Hongsoo Kim

IPC分类号： H01L27/11582

CPC分类号： H01L27/11582 ,  H01L28/00

摘要： A semiconductor memory device may include an electrode structure including a selection line on a substrate and word lines between the substrate and the selection line, vertical pillars penetrating the electrode structure and being connected to the substrate, sub-interconnections and bit lines sequentially stacked on and electrically connected to the vertical pillars, and lower contacts connecting the vertical pillars to the sub-interconnections. The selection line may include a plurality of selection lines separated from each other in a first direction by an insulating separation layer, and central axes of the lower contacts connected in common to one of the sub-interconnections may be shifted, in a second direction across the first direction and parallel to a top surface of the substrate, from central axes of the vertical pillars thereunder.

公开(公告)号：US09768190B2

公开(公告)日：2017-09-19

申请号：US14963280

申请日：2015-12-09

申请人： TaeHee Lee ,  Kyoung-Hoon Kim ,  Hongsoo Kim

发明人： TaeHee Lee ,  Kyoung-Hoon Kim ,  Hongsoo Kim

IPC分类号： H01L29/792 ,  H01L27/11582

CPC分类号： H01L27/11582 ,  H01L28/00

摘要： A semiconductor memory device may include an electrode structure including a selection line on a substrate and word lines between the substrate and the selection line, vertical pillars penetrating the electrode structure and being connected to the substrate, sub-interconnections and bit lines sequentially stacked on and electrically connected to the vertical pillars, and lower contacts connecting the vertical pillars to the sub-interconnections. The selection line may include a plurality of selection lines separated from each other in a first direction by an insulating separation layer, and central axes of the lower contacts connected in common to one of the sub-interconnections may be shifted, in a second direction across the first direction and parallel to a top surface of the substrate, from central axes of the vertical pillars thereunder.

公开(公告)号：US20170040336A1

公开(公告)日：2017-02-09

申请号：US14963280

申请日：2015-12-09

申请人： TaeHee Lee ,  Kyoung-Hoon KIM ,  Hongsoo KIM

发明人： TaeHee Lee ,  Kyoung-Hoon KIM ,  Hongsoo KIM

IPC分类号： H01L27/115

CPC分类号： H01L27/11582 ,  H01L28/00

摘要： A semiconductor memory device may include an electrode structure including a selection line on a substrate and word lines between the substrate and the selection line, vertical pillars penetrating the electrode structure and being connected to the substrate, sub-interconnections and bit lines sequentially stacked on and electrically connected to the vertical pillars, and lower contacts connecting the vertical pillars to the sub-interconnections. The selection line may include a plurality of selection lines separated from each other in a first direction by an insulating separation layer, and central axes of the lower contacts connected in common to one of the sub-interconnections may be shifted, in a second direction across the first direction and parallel to a top surface of the substrate, from central axes of the vertical pillars thereunder.

摘要翻译： 半导体存储器件可以包括：电极结构，其包括在衬底上的选择线和衬底与选择线之间的字线，穿过电极结构的垂直柱和连接到衬底，顺序堆叠在衬底上的子互连和位线 电连接到垂直柱，以及将垂直柱连接到副互连的下触点。 选择线可以包括通过绝缘分离层在第一方向上彼此分离的多条选择线，并且共同连接到一个子互连的下触点的中心轴可以沿着第二方向跨越 第一方向并平行于基板的顶表面，从其垂直柱的中心轴线。