公开(公告)号：US07229874B2

公开(公告)日：2007-06-12

申请号：US10778525

申请日：2004-02-12

申请人： Tahir Hussain ,  Rajesh D. Rajavel ,  Mary C. Montes

发明人： Tahir Hussain ,  Rajesh D. Rajavel ,  Mary C. Montes

IPC分类号： H01L21/8249 ,  H01L21/336 ,  H01L21/331

CPC分类号： H01L29/66318 ,  H01L29/41708 ,  H01L29/7371

摘要： A method and apparatus for depositing self-aligned base contacts where over-etching the emitter sidewall to undercut the emitter contact is not needed. A semiconductor structure has a T-shaped emitter contact that comprises a T-top and T-foot. The T-top acts as a mask for depositing the base contacts. In forming the T-top, its dimensions may be varied, thereby allowing the spacing between the base contacts and emitter to be adjusted.

摘要翻译： 不需要用于沉积自对准基极触点的方法和装置，其中过蚀刻发射极侧壁以切割发射极接触。 半导体结构具有包括T形顶部和T形脚的T形发射体接触。 T形顶部用作沉积基部触点的掩模。 在形成T形顶部时，其尺寸可以变化，从而允许调节基座触头和发射器之间的间隔。

公开(公告)号：US06680236B2

公开(公告)日：2004-01-20

申请号：US10044689

申请日：2002-01-11

申请人： Tahir Hussain ,  Mary C. Montes

发明人： Tahir Hussain ,  Mary C. Montes

IPC分类号： H01L21331

CPC分类号： H01L29/66318

摘要： A method is provided for improving edge terminations in a semiconductor device while maintaining breakdown voltage of said semiconductor device at or near its theoretical limit. The method comprises: employing ion-implantation to create a compensated region around the semiconductor device, followed by wet chemical etching to form a mesa on the order of 0.2 to 0.3 &mgr;m. The method provides a simple but novel approach to fabricate edge terminations in semiconductor devices in general and in devices employing p-n junctions such as in a GaAs heterojunction bipolar transistor (HBT) to achieve near-ideal electrical characteristics at the device edge. Instead of traditional edge beveling techniques such as those involving grinding, sandblasting, or mesa-etching using masks, the technique disclosed herein utilizes ion-implantation to create a compensated region around the device and wet chemical etching to make a shallow mesa.

摘要翻译： 提供一种用于改善半导体器件中的边缘端接的方法，同时将所述半导体器件的击穿电压保持在理论极限处或接近其理论极限。 该方法包括：使用离子注入在半导体器件周围产生补偿区域，随后进行湿式化学蚀刻以形成0.2至0.3μm的数量级的台面。 该方法提供了一种简单而新颖的方法来制造半导体器件中的边缘终端以及采用p-n结的器件，例如在GaAs异质结双极晶体管（HBT）中，以在器件边缘实现接近理想的电特性。 代替传统的边缘倒角技术，例如涉及使用掩模的研磨，喷砂或台面蚀刻的那些技术，本文公开的技术利用离子注入在该装置周围产生补偿区域，并进行湿化学蚀刻以形成浅台面。