-
公开(公告)号:US12154933B2
公开(公告)日:2024-11-26
申请号:US17816000
申请日:2022-07-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Feng-Chien Hsieh , Kuo-Cheng Lee , Ying-Hao Chen , Yun-Wei Cheng
IPC: H01L27/146
Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.
-
公开(公告)号:US11670562B2
公开(公告)日:2023-06-06
申请号:US17107312
申请日:2020-11-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee , Ying-Hao Chen
IPC: H01L23/367 , H01L23/48 , H01L25/065
CPC classification number: H01L23/367 , H01L23/481 , H01L25/0657
Abstract: The present disclosure describes heat dissipation structures formed in functional or non-functional areas of a three-dimensional chip structure. These heat dissipation structures are configured to route the heat generated within the three-dimensional chip structure to designated areas on or outside the three-dimensional chip structure. For example, the three-dimensional chip structure can include a plurality of chips vertically stacked on a substrate, a first passivation layer interposed between a first chip and a second chip of the plurality of chips, and a heat dissipation layer embedded in the first passivation layer and configured to allow conductive structures to pass through.
-
公开(公告)号:US11367745B2
公开(公告)日:2022-06-21
申请号:US16998498
申请日:2020-08-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee , Ying-Hao Chen
IPC: H01L27/146 , H01L31/0216 , H01L31/028
Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.
-
公开(公告)号:US11171199B2
公开(公告)日:2021-11-09
申请号:US16549835
申请日:2019-08-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Ting Chen , Tsung-Han Tsai , Kun-Tsang Chuang , Po-Jen Wang , Ying-Hao Chen , Chien-Cheng Huang
IPC: H01L49/02 , H01L21/02 , H01L21/3213
Abstract: The present disclosure relates to an apparatus that includes a bottom electrode and a dielectric structure. The dielectric structure includes a first dielectric layer on the bottom electrode and the first dielectric layer has a first thickness. The apparatus also includes a blocking layer on the first dielectric layer and a second dielectric layer on the blocking layer. The second dielectric layer has a second thickness that is less than the first thickness. The apparatus further includes a top electrode over the dielectric structure.
-
公开(公告)号:US20150200299A1
公开(公告)日:2015-07-16
申请号:US14224961
申请日:2014-03-25
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: I-Chih CHEN , Ying-Lang Wang , Chih-Mu Huang , Ying-Hao Chen , Wen-Chang Kuo , Jung-Chi Jeng
IPC: H01L29/78 , H01L29/08 , H01L29/66 , H01L29/161 , H01L29/167
CPC classification number: H01L29/7848 , H01L29/0847 , H01L29/165 , H01L29/167 , H01L29/66628 , H01L29/66636
Abstract: A semiconductor device and a method of fabricating the semiconductor device are provided. The semiconductor device includes a substrate; a source/drain region having a first dopant in the substrate; a barrier layer having a second dopant formed around the source/drain region in the substrate. When a semiconductor device is scaled down, the doped profile in source/drain regions might affect the threshold voltage uniformity, the provided semiconductor device may improve the threshold voltage uniformity by the barrier layer to control the doped profile.
Abstract translation: 提供半导体器件和制造半导体器件的方法。 半导体器件包括衬底; 在衬底中具有第一掺杂剂的源/漏区; 阻挡层,其具有形成在衬底中的源极/漏极区周围的第二掺杂物。 当半导体器件按比例缩小时,源极/漏极区域中的掺杂分布可能影响阈值电压均匀性,所提供的半导体器件可以通过阻挡层来改善阈值电压均匀性以控制掺杂分布。
-
公开(公告)号:US20230402478A1
公开(公告)日:2023-12-14
申请号:US18232323
申请日:2023-08-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Wei CHENG , Chun-Hao Chou , Kuo-Cheng Lee , Ying-Hao Chen
IPC: H01L27/146 , H01L31/0216 , H01L31/028
CPC classification number: H01L27/1463 , H01L31/02161 , H01L31/028
Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.
-
公开(公告)号:US11798969B2
公开(公告)日:2023-10-24
申请号:US17841546
申请日:2022-06-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee , Ying-Hao Chen
IPC: H01L27/146 , H01L31/0216 , H01L31/028
CPC classification number: H01L27/1463 , H01L31/028 , H01L31/02161
Abstract: Apparatus and methods for sensing long wavelength light are described herein. A semiconductor device includes: a carrier; a device layer on the carrier; a semiconductor layer on the device layer, and an insulation layer on the semiconductor layer. The semiconductor layer includes isolation regions and pixel regions. The isolation regions are or include a first semiconductor material. The pixel regions are or include a second semiconductor material that is different from the first semiconductor material.
-
公开(公告)号:US11769780B2
公开(公告)日:2023-09-26
申请号:US16937306
申请日:2020-07-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Feng-Chien Hsieh , Kuo-Cheng Lee , Ying-Hao Chen , Yun-Wei Cheng
IPC: H01L27/14 , H01L27/146
CPC classification number: H01L27/1464 , H01L27/14621 , H01L27/14636 , H01L27/14685
Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.
-
公开(公告)号:US11600727B2
公开(公告)日:2023-03-07
申请号:US16892458
申请日:2020-06-04
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Jung-Chi Jeng , I-Chih Chen , Wen-Chang Kuo , Ying-Hao Chen , Ru-Shang Hsiao , Chih-Mu Huang
Abstract: A method for forming a semiconductor device is provided. The method includes forming an isolation structure in a semiconductor substrate. The method includes forming a gate over the semiconductor substrate. The method includes forming a support film over the isolation structure. The support film is a continuous film which continuously covers the isolation structure and the gate over the isolation structure, the support film conformally covers a first portion of a top surface and a second portion of a first sidewall of the gate, the top surface faces away from the semiconductor substrate, the support film and a topmost surface of the active region do not overlap with each other, and the topmost surface faces the gate. The method includes after forming the support film, forming lightly doped regions in the semiconductor substrate and at two opposite sides of the gate.
-
公开(公告)号:US11171172B2
公开(公告)日:2021-11-09
申请号:US16512834
申请日:2019-07-16
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Yun-Wei Cheng , Chun-Hao Chou , Kuo-Cheng Lee , Ying-Hao Chen
IPC: H01L27/146
Abstract: A back side illumination (BSI) image sensor is provided. The BSI image sensor includes a semiconductor substrate, a first dielectric layer, a reflective element, a second dielectric layer and a color filter layer. The semiconductor substrate has a front side and a back side. The first dielectric layer is disposed on the front side of the semiconductor substrate. The reflective element is disposed on the first dielectric layer, in which the reflective element has an inner sidewall contacting the first dielectric layer, and the inner sidewall has a zigzag profile. The second dielectric layer is disposed on the first dielectric layer and the reflective element. The color filter layer is disposed on the backside of the semiconductor substrate.
-
-
-
-
-
-
-
-
-