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公开(公告)号：US11723212B2
公开(公告)日：2023-08-08
申请号：US17346627
申请日：2021-06-14
发明人： Hai-Dang Trinh , Yi Yang Wei , Bi-Shen Lee , Fa-Shen Jiang , Hsun-Chung Kuang , Cheng-Yuan Tsai
摘要： In some embodiments, the present disclosure relates to an integrated chip that includes one or more interconnect dielectric layers arranged over a substrate. A bottom electrode is disposed over a conductive structure and extends through the one or more interconnect dielectric layers. A top electrode is disposed over the bottom electrode. A ferroelectric layer is disposed between and contacts the bottom electrode and the top electrode. The ferroelectric layer includes a first lower horizontal portion, a first upper horizontal portion arranged above the first lower horizontal portion, and a first sidewall portion and coupling the first lower horizontal portion to the first upper horizontal portion.
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公开(公告)号：US11527717B2
公开(公告)日：2022-12-13
申请号：US16807564
申请日：2020-03-03
发明人： Hai-Dang Trinh , Chii-Ming Wu , Hsing-Lien Lin , Tzu-Chung Tsai , Fa-Shen Jiang , Bi-Shen Lee
摘要： Various embodiments of the present disclosure are directed towards a memory cell including a co-doped data storage structure. A bottom electrode overlies a substrate and a top electrode overlies the bottom electrode. The data storage structure is disposed between the top and bottom electrodes. The data storage structure comprises a dielectric material doped with a first dopant and a second dopant.
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公开(公告)号：US20220285374A1
公开(公告)日：2022-09-08
申请号：US17306103
申请日：2021-05-03
发明人： Bi-Shen Lee , Tzu-Yu Lin , Yi Yang Wei , Hai-Dang Trinh , Hsun-Chung Kuang , Cheng-Yuan Tsai
IPC分类号： H01L27/1159 , H01L27/11507
摘要： In some embodiments, the present disclosure relates to a memory device including a semiconductor substrate, a first electrode disposed over the semiconductor substrate, a ferroelectric layer disposed between the first electrode and the semiconductor substrate, and a first stressor layer separating the first electrode from the ferroelectric layer. The first stressor layer has a coefficient of thermal expansion greater than that of the ferroelectric layer.
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公开(公告)号：US20210280780A1
公开(公告)日：2021-09-09
申请号：US16807600
申请日：2020-03-03
摘要： Some embodiments relate to a memory device. The memory device includes a bottom electrode overlying a substrate. A data storage layer overlies the bottom electrode. A top electrode overlies the data storage layer. A conductive bridge is selectively formable within the data storage layer to couple the bottom electrode to the top electrode. A diffusion barrier layer is disposed between the data storage layer and the top electrode.
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公开(公告)号：US20210111343A1
公开(公告)日：2021-04-15
申请号：US16601771
申请日：2019-10-15
发明人： Fa-Shen Jiang , Cheng-Yuan Tsai , Hai-Dang Trinh , Hsing-Lien Lin , Bi-Shen Lee
摘要： The present disclosure relates to a method of forming a resistive random access memory (RRAM) device. In some embodiments, the method may be performed by forming a first electrode structure over a substrate. A doped data storage element is formed over the first electrode structure. The doped data storage element is formed by forming a first data storage layer over the first electrode structure and forming a second data storage layer over the first data storage layer. The first data storage layer is formed to have a first doping concentration of a dopant and the second data storage layer is formed to have a second doping concentration of the dopant that is less than the first doping concentration. A second electrode structure is formed over the doped data storage element.
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公开(公告)号：US20210043835A1
公开(公告)日：2021-02-11
申请号：US17081138
申请日：2020-10-27
发明人： Hai-Dang Trinh
摘要： In some embodiments, a semiconductor device is provided. The semiconductor device includes a first amorphous switching structure disposed over a first electrode. A buffer structure is disposed over the first amorphous switching structure. A second amorphous switching structure is disposed over the buffer structure. A second electrode is disposed over the second amorphous switching structure, where the first and second amorphous switching structures are configured to switch between low resistance states and high resistance states depending on whether a voltage from the first electrode to the second electrode exceeds a threshold voltage.
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公开(公告)号：US10811600B2
公开(公告)日：2020-10-20
申请号：US16655478
申请日：2019-10-17
发明人： Hai-Dang Trinh , Cheng-Yuan Tsai , Hsing-Lien Lin , Wen-Ting Chu
摘要： The present disclosure, in some embodiments, relates to a resistive random access memory (RRAM) device. The RRAM device includes a first electrode over a substrate and a second electrode over the substrate. A data storage structure is disposed between the first electrode and the second electrode. The data storage structure has a plurality of sub-layers including one or more metals having non-zero concentrations that change as a distance from the first electrode increases.
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公开(公告)号：US20200274058A1
公开(公告)日：2020-08-27
申请号：US15931896
申请日：2020-05-14
发明人： Hai-Dang Trinh , Hsing-Lien Lin , Chii-Ming Wu , Cheng-Yuan Tsai
摘要： A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a lower electrode over the semiconductor substrate. The semiconductor device structure also includes a first dielectric layer over the lower electrode, a second dielectric layer over the first dielectric layer, and a third dielectric layer over the second dielectric layer. Oxygen ions are bonded more tightly in the second dielectric layer than those in the first dielectric layer, and oxygen ions are bonded more tightly in the second dielectric layer than those in the third dielectric layer.
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公开(公告)号：US20200035916A1
公开(公告)日：2020-01-30
申请号：US16587617
申请日：2019-09-30
发明人： Hai-Dang Trinh
摘要： In some embodiments, a semiconductor device is provided. The semiconductor device includes a first amorphous switching structure disposed over a first electrode. A buffer structure is disposed over the first amorphous switching structure. A second amorphous switching structure is disposed over the buffer structure. A second electrode is disposed over the second amorphous switching structure, where the first and second amorphous switching structures are configured to switch between low resistance states and high resistance states depending on whether a voltage from the first electrode to the second electrode exceeds a threshold voltage.
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公开(公告)号：US09728597B2
公开(公告)日：2017-08-08
申请号：US14800144
申请日：2015-07-15
发明人： Hsing-Lien Lin , Chia-Shiung Tsai , Cheng-Yuan Tsai , Huey-Chi Chu , Hai-Dang Trinh , Wen-Chuan Chiang , Wei-Min Tseng
IPC分类号： H01L49/02 , H01L21/02 , H01L23/522
CPC分类号： H01L28/60 , H01L21/0226 , H01L21/0228 , H01L23/5223
摘要： A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a bottom electrode layer over a substrate and forming a first passivation layer over the bottom electrode layer by a first atomic layer deposition process. The method for manufacturing a semiconductor structure further includes forming a dielectric layer over the first passivation layer by a second atomic layer deposition process and forming a second passivation layer over the dielectric layer by a third atomic layer deposition process. The method for manufacturing a semiconductor structure further includes forming a top electrode layer over the second passivation layer.
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