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公开(公告)号：US20080282119A1
公开(公告)日：2008-11-13
申请号：US11877188
申请日：2007-10-23
CPC分类号： G11C29/16
摘要： A memory device including, a nonvolatile memory which stores a step item, a parameter start address, and a parameter which has an address corresponding to the parameter start address and defines the step item, and a controller which performs, on the nonvolatile memory, a test step corresponding to the step item defined by the parameter, the controller being formed in the same chip as the nonvolatile memory.
摘要翻译： 一种存储装置，包括存储步骤项目的非易失性存储器，参数起始地址和具有与参数起始地址对应的地址并定义步骤项目的参数的参数，以及控制器，其在非易失性存储器上执行 测试步骤对应于由参数定义的步骤项目，控制器形成在与非易失性存储器相同的芯片中。
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公开(公告)号：US20120210108A1
公开(公告)日：2012-08-16
申请号：US13367708
申请日：2012-02-07
IPC分类号： G06F9/44
CPC分类号： G11C11/005 , G11C11/419
摘要： According to one embodiment, a semiconductor device includes a first sequencer and a second sequencer. The first sequencer operates at a first frequency. The second sequencer operates at a second frequency that is higher than the first frequency. In the first mode, the first sequencer operates in accordance with an instruction received from an external apparatus, and the second sequencer operates under control of the first sequencer. In the second mode, the second sequencer operates in accordance with an instruction received from the external apparatus, and the operation of the first sequencer is stopped.
摘要翻译： 根据一个实施例，半导体器件包括第一定序器和第二定序器。 第一个音序器以第一个频率运行。 第二定序器在高于第一频率的第二频率下操作。 在第一模式中，第一定序器根据从外部设备接收的指令进行操作，第二定序器在第一定序器的控制下操作。 在第二模式中，第二定序器根据从外部设备接收的指令进行操作，并且停止第一定序器的操作。
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公开(公告)号：US20120155191A1
公开(公告)日：2012-06-21
申请号：US13239480
申请日：2011-09-22
申请人： Shoichiro Hashimoto , Tokumasa Hara
发明人： Shoichiro Hashimoto , Tokumasa Hara
IPC分类号： G11C7/10
CPC分类号： G11C7/1006 , G11C11/005 , G11C16/0483
摘要： According to one embodiment, a semiconductor memory device includes a first memory configured to receive a first clock and including a first buffer configured to perform a data input operation and a data output operation, a second memory including a second buffer configured to perform a data input operation and a data output operation, and a data bus configured to connect the first buffer and the second buffer. The first memory transfers a second clock to the second memory using the first clock. The first buffer transfers data to the second memory in response to the first clock. The second buffer receives the data from the first buffer in response to the second clock.
摘要翻译： 根据一个实施例，半导体存储器件包括：第一存储器，被配置为接收第一时钟并且包括被配置为执行数据输入操作和数据输出操作的第一缓冲器;第二存储器，包括被配置为执行数据输入的第二缓冲器 操作和数据输出操作，以及配置为连接第一缓冲器和第二缓冲器的数据总线。 第一个存储器使用第一个时钟将第二个时钟传送到第二个存储器。 第一缓冲器响应于第一时钟将数据传送到第二存储器。 第二缓冲器响应于第二时钟从第一缓冲器接收数据。
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公开(公告)号：US4465872A
公开(公告)日：1984-08-14
申请号：US391445
申请日：1982-06-23
CPC分类号： C07C37/56
摘要： p-Cresol is produced in one step by direct oxidation of p-tolualdehyde with a peroxide in formic acid as a solvent while keeping 3 to 15% by weight of water in formic acid on the basis of formic acid and a reaction temperature in a range of 50.degree. to 150.degree. C.
摘要翻译： 通过在甲酸作为溶剂中用过氧化物直接氧化对甲苯甲醛，同时在甲酸的基础上在甲酸中保持3至15重量％的水，并在一定范围内的反应温度，一步法生产对甲酚。 50〜150℃
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公开(公告)号：US4444738A
公开(公告)日：1984-04-24
申请号：US323989
申请日：1981-11-23
CPC分类号： C01B33/2876 , C07C1/20 , C07C2529/06 , Y10S423/22
摘要： A process for producing a crystalline aluminosilicate which comprises hydrothermally reacting a starting mixture composed of a silicon compound, an aluminum compound, an alkali metal compound, a compound capable of releasing an organic cation in water, and water, characterized in that said starting mixture comprises at least two colloids having different silicon/aluminum atomic ratios, and that the hydrothermal reaction is carried out, as required, in the presence of a fluorine compound.
摘要翻译： 一种结晶性硅铝酸盐的制造方法，其特征在于，将由硅化合物，铝化合物，碱金属化合物，能够释放水中的有机阳离子的化合物组成的起始混合物与水热水反应，其特征在于，所述起始混合物包含 至少两种具有不同硅/铝原子比的胶体，并且根据需要在氟化合物的存在下进行水热反应。
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