摘要:
A semiconductor memory device includes a memory cell array, a power source circuit, a sense amplifier, a control circuit, and a processor. The memory cell array includes a nonvolatile memory cell. The power source circuit includes a first register and generates a voltage. The sense amplifier includes a second register, reads from the memory cell and amplifies the read data. The control circuit includes a third register and controls operations of the power source circuit and the sense amplifier. The processor controls the operations of the power source circuit, the sense amplifier and the control circuit by giving an instruction to the first to third registers. The control circuit decodes the instruction received at the third register so as to control the power source circuit and the sense amplifier directly based on a result of decoding.
摘要:
A semiconductor memory device includes a memory cell array, a power source circuit, a sense amplifier, a control circuit, and a processor. The memory cell array includes a nonvolatile memory cell. The power source circuit includes a first register and generates a voltage. The sense amplifier includes a second register, reads from the memory cell and amplifies the read data. The control circuit includes a third register and controls operations of the power source circuit and the sense amplifier. The processor controls the operations of the power source circuit, the sense amplifier and the control circuit by giving an instruction to the first to third registers. The control circuit decodes the instruction received at the third register so as to control the power source circuit and the sense amplifier directly based on a result of decoding.
摘要:
A semiconductor memory device includes a semiconductor memory, an auto-operation control circuit which outputs a clock signal, a sync read control circuit which outputs a sync read address in sync with the clock signal, a read control circuit which selects a read address of the semiconductor memory in accordance with an address of the sync read address, a read sense amplifier circuit which outputs a data read signal that is produced by sensing data that is read out of the semiconductor memory in accordance with the read address, and a determination circuit which compares the data read signal with an expectation value.
摘要:
A memory device including, a nonvolatile memory which stores a step item, a parameter start address, and a parameter which has an address corresponding to the parameter start address and defines the step item, and a controller which performs, on the nonvolatile memory, a test step corresponding to the step item defined by the parameter, the controller being formed in the same chip as the nonvolatile memory.
摘要:
A semiconductor memory device is capable of simultaneously carrying out a first operation and a second operation. The semiconductor memory device includes first and second control circuits, a select control circuit, and a select circuit. The first control circuit controls the first operation according to a first address signal and outputs a read start signal when the reading of the data is started. The second control circuit controls the second operation according to a second address signal and outputs a sequence flag when the first and second addresses coincide with each other. The select control circuit generates a select control signal. The select control signal is asserted if the second operation is carried out. The first control circuit instructs the select circuit to select the sequence flag if the select control signal is asserted or the data if the select control signal is negated.
摘要:
A semiconductor memory device is capable of simultaneously carrying out a first operation and a second operation. The semiconductor memory device includes first and second control circuits, a select control circuit, and a select circuit. The first control circuit controls the first operation according to a first address signal and outputs a read start signal when the reading of the data is started. The second control circuit controls the second operation according to a second address signal and outputs a sequence flag when the first and second addresses coincide with each other. The select control circuit generates a select control signal. The select control signal is asserted if the second operation is carried out. The first control circuit instructs the select circuit to select the sequence flag if the select control signal is asserted or the data if the select control signal is negated.
摘要:
A non-volatile semiconductor storage device includes a memory cell array having a plurality of non-volatile memory cells, an address search circuit which searches for write object data and outputs an address where the write object data is present, when writing data into the non-volatile memory cells, and a control circuit which exercises control to write the write object data into the non-volatile memory cells in accordance with the address output from the address search circuit.
摘要:
A non-volatile semiconductor storage device includes a memory cell array having a plurality of non-volatile memory cells, an address search circuit which searches for write object data and outputs an address where the write object data is present, when writing data into the non-volatile memory cells, and a control circuit which exercises control to write the write object data into the non-volatile memory cells in accordance with the address output from the address search circuit.
摘要:
An electronic device includes a power supply and a power supply circuit. The power supply circuit is configured to alternately switch a state of the electronic device between a first state to supply power to another device and a second state to receive power from said another device, and stop a switching operation of the state of the electronic device when the electronic device is off, to fix the state of the electronic device to one of the first state and the second state.
摘要:
An catalyst for purifying exhaust gas comprising an OCS material that has sufficient heat resistance and achieves a favorable balance between the oxygen storage volume and the oxygen absorption/release rate includes an catalyst for purifying exhaust, which has a substrate and a catalyst coating layer formed on the substrate, wherein the catalyst coating layer comprises a ceria-zirconia-based composite oxide having a pyrochlore structure in an amount of 5 to 100 g/L based on the volume of the substrate, the ceria-zirconia-based composite oxide has a secondary particle size (D50) of 3 μm to 7 μm, and the ceria-zirconia-based composite oxide optionally contains praseodymium.