公开(公告)号：US07876169B2

公开(公告)日：2011-01-25

申请号：US11995453

申请日：2006-02-08

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H03C1/00 ,  H03C3/00

CPC分类号： H04L27/364 ,  H04L27/206

摘要： There are included a first quadrature modulation part (5) that divides an input signal into an I signal and a Q signal having a phase orthogonal to the phase thereof and uses a baseband frequency to perform frequency conversions of the I and Q signals, thereby performing a quadrature modulation; and a second quadrature modulation part (8) that uses in-phase and quadrature carriers of FM frequencies, which are 90 degrees out of phase with respect to each other, to perform frequency conversions of the I and Q signals, which are generated by the first quadrature modulation part (5), thereby performing a quadrature modulation. Thus, the phases of the I and Q signals, which are shifted by 90 degrees with respect to each other by the first quadrature modulation part (5), are further shifted by 90 degrees with respect to each other by the second quadrature modulation part (8), thereby providing frequency components the phases of which have been inverted, whereby the unwanted harmonic components at the spurious sides of a target frequency can be attenuated.

摘要翻译： 包括将输入信号分割为I信号的第一正交调制部分（5）和具有与其相位正交的相位的Q信号，并且使用基带频率来执行I和Q信号的频率转换，由此执行 正交调制; 以及第二正交调制部分（8），其使用相对于彼此相差90度的FM频率的同相和正交载波，以执行由所述I和Q信号产生的I和Q信号的频率转换 第一正交调制部分（5），从而执行正交调制。 因此，通过第一正交调制部（5）相对于彼此偏移90度的I和Q信号的相位通过第二正交调制部分（...）相对于彼此进一步偏移90度 8），从而提供其相位已被反转的频率分量，从而可以衰减目标频率的杂散侧的不需要的谐波分量。

公开(公告)号：US20090298454A1

公开(公告)日：2009-12-03

申请号：US12295912

申请日：2006-11-08

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/16 ,  H04B1/26

CPC分类号： H03G3/3068 ,  H04B1/001

摘要： By A/D converting a signal output from a mixer (4) and inputting the A/D converted signal to a DSP (8), and generating AGC control data (DL) corresponding to a level of the signal to control a gain of an LNA (3) in such a manner that a voltage input to an A/D converting circuit (7) is lower than a full scale voltage of the A/D converting circuit (7), it is possible to prevent a signal having an excessively high level beyond a dynamic range of the A/D converting circuit (7) from being input to the A/D converting circuit (7). By controlling the gain of the LNA (3) corresponding to a level of a broad band signal before passing through a BPF (11) and controlling a gain of an IF amplifier (12) corresponding to a level of a narrow band signal after passing through the BPF (11), moreover, it is possible to properly control a gain of an AGC as a whole in consideration of signal levels of both a desirable wave and a disturbing wave.

摘要翻译： 通过A / D转换从混频器（4）输出的信号并将A / D转换的信号输入到DSP（8），并产生对应于信号电平的AGC控制数据（DL）以控制一个 LNA（3），使得输入到A / D转换电路（7）的电压低于A / D转换电路（7）的满量程电压，可以防止过度的信号 高于A / D转换电路（7）的动态范围的输入到A / D转换电路（7）的高电平。 通过在通过BPF（11）之前控制对应于宽频带信号的电平的LNA（3）的增益，并且控制与通过后的窄频带信号的电平相对应的IF放大器（12）的增益 BPF（11），此外，考虑到期望的波和干扰波的信号电平，可以整体地适当地控制AGC的增益。

公开(公告)号：US20090215414A1

公开(公告)日：2009-08-27

申请号：US12393134

申请日：2009-02-26

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/18

CPC分类号： H04B1/18

摘要： A JFET 4 to be an antenna buffer for an AM broadcasting signal is constituted in a source follower form of a 100% negative feedback type, and a tuning circuit including a variable capacitive circuit 7 and a transformer 6 is provided in a subsequent stage to the JFET 4 and an amplifying circuit including MOSFETs 10 and 11 is provided in a further subsequent stage thereto. Consequently, it is possible to reduce a signal distortion rate in the JFET 4 and to eliminate a drawback that every frequency component enters the amplifying circuit to saturate the amplifying circuit, resulting in an occurrence of a distortion in an output signal. By switching a plurality of capacitors CT1, CT2, . . . CTn to cause a capacitance value to be variable without using a varactor diode, it is possible to integrate the capacitors CT1, CT2, . . . CTn in an IC 20.

摘要翻译： 作为AM广播信号的天线缓冲器的JFET 4以100％负反馈型的源极跟随器形式构成，并且在随后的阶段中提供包括可变电容电路7和变压器6的调谐电路 JFET 4和包括MOSFET 10和11的放大电路在其后续阶段提供。 因此，可以降低JFET 4中的信号失真率，并且消除每个频率分量进入放大电路以使放大电路饱和，从而导致输出信号中出现失真的缺点。 通过切换多个电容器CT1，CT2，...。 。 。 CTn使得电容值可变，而不使用变容二极管，可以集成电容器CT1，CT2。 。 。 CTn在IC 20。

公开(公告)号：US07561863B2

公开(公告)日：2009-07-14

申请号：US11441055

申请日：2006-05-26

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H03G3/3052

摘要： A received signal level is detected in each of a wide band, middle band, and narrow band and each detected signal is converted to a digital signal. A DSP 18 determines the enabled/disabled state of an LNA 3 and an attenuator 4 as well as a gain adjustment amount based on the signal level of each band. For example, the gain adjustment is not performed when the signal level of the narrow band including a desired frequency is not larger than a prescribed value even the signal level of the wide band or middle band is larger than a prescribed value. When the signal level of the narrow band is larger than the prescribed value exceeding a gain adjustable limit level in the attenuator 4, the gain of the LNA 3 is adjusted, while maintaining the gain adjustable amount in the attenuator 4 around the limit level, to reduce the gain as a whole.

摘要翻译： 在宽带，中频带和窄带中的每一个中检测到接收信号电平，并且将每个检测信号转换为数字信号。 DSP18根据每个频带的信号电平确定LNA 3和衰减器4的使能/禁止状态以及增益调整量。 例如，即使宽带或中频带的信号电平大于规定值，当包含期望频率的窄带的信号电平不大于规定值时，也不进行增益调整。 当窄带的信号电平大于衰减器4中超过增益可调极限电平的规定值时，调节LNA 3的增益，同时将衰减器4中的增益可调量保持在限制电平附近，至 减少整体收益。

公开(公告)号：US06753736B2

公开(公告)日：2004-06-22

申请号：US10606964

申请日：2003-06-27

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H03F304

CPC分类号： H03F3/195 ,  H03F1/223 ,  H03F1/26 ,  H03F3/193 ,  H03F3/1935 ,  H03F2200/324 ,  H03F2200/372 ,  H03F2200/541

摘要： An amplifier circuit for AM broadcasting for amplifying an inputted AM broadcast signal by an FET and outputting it. The amplifier circuit comprises FETs for signal amplification which are P-channel MOSFETs (4, 5) of relatively small flicker noise. While suppressing the flicker noise to a lowest possible level, more circuits including the RF amplifier for AM broadcasting can be integrated on one chip, thereby realizing small size and low noise of the circuits.

摘要翻译： 一种用于AM广播的放大器电路，用于通过FET放大输入的AM广播信号并将其输出。 放大器电路包括用于信号放大的FET，其是具有相对小的闪烁噪声的P沟道MOSFET（4,5）。 在将闪烁噪声抑制到最低水平的同时，包括用于AM广播的RF放大器的更多电路可以集成在一个芯片上，从而实现电路的小尺寸和低噪声。

公开(公告)号：US20090253395A1

公开(公告)日：2009-10-08

申请号：US12303157

申请日：2007-02-06

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/18

CPC分类号： H04B1/18 ,  H03H11/1252 ,  H03H11/1291 ,  H03J2200/06 ,  H03J2200/10 ,  H03J2200/18 ,  H03L7/08 ,  H03L7/0805

摘要： There are provided a variable tuning filter 11 for selecting any of resistance elements by changing over a switch to cause a tuning frequency fF to be variable, and an oscillating circuit 12 constituted in the same manner as the variable tuning filter 11, and an oscillating frequency fL of the oscillating circuit 12 which is monitored by a frequency counter 13 and a desirable received frequency fr which is preset by a control circuit 14 are compared with each other based on respective frequency count values, and the oscillating frequency fL of the oscillating circuit 12 is varied in such a manner that both of the frequencies are coincident with each other within an allowable error range, and correspondingly, the tuning frequency fF of the variable tuning filter 11 is also varied. Consequently, it is possible to adjust the tuning frequency fF of the variable tuning filter 11 to be coincident with the desirable received frequency fr without using a variable capacitance diode which is hard to integrate or the like.

摘要翻译： 提供了可变调谐滤波器11，用于通过切换开关来选择任何电阻元件，以使调谐频率fF可变，以及以与可变调谐滤波器11相同的方式构成的振荡电路12和振荡频率 由频率计数器13监视的振荡电路12的fL和由控制电路14预置的期望接收频率fr相互比较，并且振荡电路12的振荡频率fL 以允许误差范围内的两个频率彼此一致的方式变化，相应地，可变调谐滤波器11的调谐频率fF也变化。 因此，可以将可变调谐滤波器11的调谐频率fF调整为与期望的接收频率fr一致，而不使用难以集成的可变电容二极管等。

公开(公告)号：US20090215422A1

公开(公告)日：2009-08-27

申请号：US12393214

申请日：2009-02-26

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/16

CPC分类号： H04B1/18 ,  H04B1/0007

摘要： By providing switch portions (8a) and (8b) for switching I and Q signals and outputting them to a single A/D converter (9), and sequentially converting the I and Q signals output from the switch portions (8a) and (8b) into digital signals by the A/D converter (9) and supplying them to a DSP (10), it is possible to carry out an A/D conversion processing for the I and Q signals through the same A/D converter (9). Consequently, it is possible to eliminate a drawback that an amplitude error or a phase error is made between the I and Q signals due to a variation in an A/D converting characteristic.

摘要翻译： 通过提供用于切换I和Q信号并将其输出到单个A / D转换器（9）的开关部分（8a）和（8b），并且顺序地转换从开关部分（8a）和（8b）输出的I和Q信号 ）由A / D转换器（9）转换为数字信号并将其提供给DSP（10），可以通过相同的A / D转换器（9）对I和Q信号执行A / D转换处理 ）。 因此，可以消除由于A / D转换特性的变化而导致I和Q信号之间产生振幅误差或相位误差的缺点。

公开(公告)号：US20090186592A1

公开(公告)日：2009-07-23

申请号：US12352686

申请日：2009-01-13

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/16

CPC分类号： H03F1/26 ,  H03F1/22 ,  H03F3/195 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/324 ,  H03F2200/451 ,  H03F2203/45148 ,  H03F2203/45548 ,  H03F2203/45631 ,  H03F2203/45702 ,  H04B1/18

摘要： A first-stage amplifier of an AM receiving circuit is built into an IC 2 as a differential amplifying circuit 3. The differential amplifying circuit 3 is connected to one pad P1 of the IC 2. Then, a high pass filter is configured by connecting a resistor Ra between two input terminals of the differential amplifying circuit 3 and connecting a capacitor Ca between the resistor Ra and ground and in series with the resistor Ra and ground. Thus, the resistor Ra and capacitor Ca integrated into the IC 2 allows hum noise to be removed.

摘要翻译： AM接收电路的第一级放大器内置在IC2中作为差分放大电路3.差分放大电路3连接到IC2的一个焊盘P1。然后，高通滤波器通过连接 在差动放大电路3的两个输入端子之间连接电阻器Ra，并将电阻器Ra和地之间的电容器Ca与电阻器Ra和接地串联。 因此，集成到IC2中的电阻器Ra和电容器Ca允许去除嗡嗡声。

公开(公告)号：US20090186591A1

公开(公告)日：2009-07-23

申请号：US12355104

申请日：2009-01-16

申请人： Takeshi Ikeda ,  Hiroshi Miyagi ,  Akira Okamoto

发明人： Takeshi Ikeda ,  Hiroshi Miyagi ,  Akira Okamoto

IPC分类号： H04B1/16

CPC分类号： H04B1/28 ,  H04B1/0007

摘要： In a mixer circuit 6 connected in common to output sides of an LNA 2 for FM receiving and an LNA 4 for AM receiving, each of a radiofrequency signal output from the LNA 2 for FM receiving and a radiofrequency signal output from the LNA 4 for AM receiving is frequency-converted into an intermediate frequency signal of a lower intermediate frequency for AM broadcast waves. In this way, receiving of an FM broadcast is performed by a low IF system and receiving of an AM broadcast is performed by a single conversion system; the need for separately providing a mixer circuit, a local oscillation circuit and an IF filter for down-mixing of AM broadcast waves is eliminated.

摘要翻译： 在共同连接到用于FM接收的LNA2的输出侧和用于AM接收的LNA 4的混频器电路6中，从用于FM接收的LNA2输出的射频信号和从LNA 4输出的用于AM的射频信号 接收被频率转换成AM广播波的较低中频的中频信号。 以这种方式，通过低IF系统执行FM广播的接收，并且通过单个转换系统执行AM广播的接收; 消除了分别提供混频器电路，本地振荡电路和用于AM广播波的下混合的IF滤波器的需要。

公开(公告)号：US07551906B2

公开(公告)日：2009-06-23

申请号：US11383087

申请日：2006-05-12

申请人： Takeshi Ikeda ,  Hiroshi Miyagi

发明人： Takeshi Ikeda ,  Hiroshi Miyagi

IPC分类号： H04B1/18 ,  H04B7/00

CPC分类号： H03J5/242 ,  H03J5/0245 ,  H03J2200/10 ,  H03L7/07 ,  H03L7/181

摘要： A couple of frequency doubler circuits 21 and 22 which multiplys a frequency of a reference oscillation signal outputted from a reference oscillator 12 is provided, thereby a frequency of a reference oscillation signal, as the greatest common divisor between a frequency (300 KHz) determined by multiplying the frequency (fx=75 KHz) of a crystal oscillator 11 by four and a frequency (54 KHz) determined by multiplying an assigned frequency per one channel in AM radio broadcasting by a prescribed divide ratio, can be higher than a conventional frequency. This way realizes the decrease of a divide ratio in a programmable counter 17, resulting in the reduction of the circuit scale, shortening of the lock-up time, and improvement of the S/N ratio.

摘要翻译： 提供了一个倍增电路21和22，它们乘以基准振荡器12输出的基准振荡信号的频率，从而提供参考振荡信号的频率，作为由（...）确定的频率（300KHz）之间的最大公约数 将晶体振荡器11的频率（fx = 75KHz）乘以4，通过将AM无线电广播中的每个信道的分配频率乘以规定的分频比而确定的频率（54KHz）可以高于常规频率。 这样可以实现可编程计数器17中的分频比的减小，导致电路规模的缩小，锁定时间的缩短以及S / N比的提高。