公开(公告)号：US20200381429A1

公开(公告)日：2020-12-03

申请号：US16984947

申请日：2020-08-04

申请人： Tela Innovations, Inc.

发明人： Michael C. Smayling ,  Scott T. Becker

IPC分类号： H01L27/092 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  G06F30/394 ,  H01L27/105 ,  H01L23/528 ,  H01L27/02

摘要： An integrated circuit includes a gate electrode level region that includes a plurality of linear-shaped conductive structures. Each of the plurality of linear-shaped conductive structures is defined to extend lengthwise in a first direction. Some of the plurality of linear-shaped conductive structures form one or more gate electrodes of corresponding transistor devices. A local interconnect conductive structure is formed between two of the plurality of linear-shaped conductive structures so as to extend in the first direction along the two of the plurality of linear-shaped conductive structures.

公开(公告)号：US10217763B2

公开(公告)日：2019-02-26

申请号：US16119727

申请日：2018-08-31

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Michael C. Smayling

IPC分类号： H01L21/70 ,  H01L29/76 ,  H01L27/118 ,  H01L27/092 ,  H01L21/28 ,  H01L29/423 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/02 ,  H01L23/528 ,  H01L23/522 ,  G06F17/50

摘要： An integrated circuit includes a first gate electrode track and a second gate electrode track. The first gate electrode track includes a first gate electrode feature that forms an n-channel transistor as it crosses an n-diffusion region. The first gate electrode track does not cross a p-diffusion region. The second gate electrode track includes a second gate electrode feature that forms a p-channel transistor as it crosses a p-diffusion region. The second gate electrode track does not cross an n-diffusion region. The integrated circuit also includes a linear shaped conductor that crosses both the first and second gate electrode features in a reference direction perpendicular to the first and second gate electrode tracks. The linear shaped conductor provides electrical connection between the first and second gate electrode features.

公开(公告)号：US20180175061A1

公开(公告)日：2018-06-21

申请号：US15872893

申请日：2018-01-16

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Jim Mali ,  Carole Lambert

IPC分类号： H01L27/118 ,  H01L27/02 ,  G06F17/50 ,  G11C5/06 ,  G11C11/412 ,  H01L27/11 ,  H01L27/105 ,  H01L27/092 ,  H01L27/088 ,  H01L23/538 ,  H01L23/528 ,  H01L23/498 ,  H01L21/8234

摘要： A first conductive structure forms gate electrodes of a first transistor of a first transistor type and a first transistor of a second transistor type. A second conductive structure forms a gate electrode of a second transistor of the first transistor type. A third conductive structure forms a gate electrode of a second transistor of the second transistor type. A fourth conductive structure forms a gate electrode of a third transistor of the first transistor type. A fifth conductive structure forms a gate electrode of a third transistor of the second transistor type. A sixth conductive structure forms gate electrodes of a fourth transistor of the first transistor type and a fourth transistor of the second transistor type. The second and third transistors of the first transistor type and the second and third transistors of the second transistor type are electrically connected to form a cross-coupled transistor configuration.

公开(公告)号：US09905576B2

公开(公告)日：2018-02-27

申请号：US15696728

申请日：2017-09-06

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Michael C. Smayling

IPC分类号： H01L27/118 ,  H01L29/423 ,  H01L23/522 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/02 ,  H01L27/092 ,  G06F17/50 ,  H01L21/28 ,  H01L23/528

CPC分类号： H01L27/11807 ,  G06F17/5068 ,  G06F17/5072 ,  H01L21/28123 ,  H01L21/823871 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L29/42372 ,  H01L29/42376 ,  H01L2027/11812 ,  H01L2027/11814 ,  H01L2027/11855 ,  H01L2027/11861 ,  H01L2027/11862 ,  H01L2027/11864 ,  H01L2027/11866 ,  H01L2027/11875 ,  H01L2027/11887 ,  H01L2027/11888 ,  H01L2924/0002 ,  H01L2924/00

摘要： Gate structures are positioned within a region in accordance with a gate horizontal grid that includes at least seven gate gridlines separated from each other by a gate pitch of less than or equal to about 193 nanometers. Each gate structure has a substantially rectangular shape with a width of less than or equal to about 45 nanometers and is positioned to extend lengthwise along a corresponding gate gridline. Each gate gridline has at least one gate structure positioned thereon. A first-metal layer is formed above top surfaces of the gate structures within the region and includes first-metal structures positioned in accordance with a first-metal vertical grid that includes at least eight first-metal gridlines. Each first-metal structure has a substantially rectangular shape and is positioned to extend along a corresponding first-metal gridline. At least six contact structures of substantially rectangular shape contact the at least six gate structures.

公开(公告)号：US09871056B2

公开(公告)日：2018-01-16

申请号：US15389883

申请日：2016-12-23

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Jim Mali ,  Carole Lambert

IPC分类号： G11C11/412 ,  H01L27/118 ,  H01L27/11 ,  G11C5/06 ,  H01L27/02 ,  H01L27/092 ,  G06F17/50 ,  H01L27/088 ,  H01L23/538 ,  H01L23/498 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/105

CPC分类号： H01L27/11807 ,  G06F17/5068 ,  G06F17/5072 ,  G11C5/06 ,  G11C11/412 ,  H01L21/823475 ,  H01L23/49844 ,  H01L23/528 ,  H01L23/5386 ,  H01L27/0207 ,  H01L27/0218 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1052 ,  H01L27/11 ,  H01L27/1104 ,  H01L2027/11853 ,  H01L2027/11875 ,  H01L2027/11887 ,  H01L2924/0002 ,  H01L2924/00

摘要： A first conductive structure forms gate electrodes of a first transistor of a first transistor type and a first transistor of a second transistor type. A second conductive structure forms a gate electrode of a second transistor of the first transistor type. A third conductive structure forms a gate electrode of a second transistor of the second transistor type. A fourth conductive structure forms a gate electrode of a third transistor of the first transistor type. A fifth conductive structure forms a gate electrode of a third transistor of the second transistor type. A sixth conductive structure forms gate electrodes of a fourth transistor of the first transistor type and a fourth transistor of the second transistor type. The second and third transistors of the first transistor type and the second and third transistors of the second transistor type are electrically connected to form a cross-coupled transistor configuration.

公开(公告)号：US20170358600A1

公开(公告)日：2017-12-14

申请号：US15688187

申请日：2017-08-28

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Michael C. Smayling

IPC分类号： H01L27/118 ,  H01L23/528 ,  H01L27/088 ,  H01L27/092 ,  H01L27/02 ,  H01L29/423 ,  H01L21/8238 ,  H01L21/28 ,  G06F17/50 ,  H01L23/522

CPC分类号： H01L27/11807 ,  G06F17/5068 ,  G06F17/5072 ,  H01L21/28123 ,  H01L21/823871 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L29/42372 ,  H01L29/42376 ,  H01L2027/11812 ,  H01L2027/11814 ,  H01L2027/11855 ,  H01L2027/11861 ,  H01L2027/11862 ,  H01L2027/11864 ,  H01L2027/11866 ,  H01L2027/11875 ,  H01L2027/11887 ,  H01L2027/11888 ,  H01L2924/0002 ,  H01L2924/00

摘要： Gate structures are positioned within a region in accordance with a gate horizontal grid that includes at least seven gate gridlines separated from each other by a gate pitch of less than or equal to about 193 nanometers. Each gate structure has a substantially rectangular shape with a width of less than or equal to about 45 nanometers and is positioned to extend lengthwise along a corresponding gate gridline. Each gate gridline has at least one gate structure positioned thereon. A first-metal layer is formed above top surfaces of the gate structures within the region and includes first-metal structures positioned in accordance with a first-metal vertical grid that includes at least eight first-metal gridlines. Each first-metal structure has a substantially rectangular shape and is positioned to extend along a corresponding first-metal gridline. At least six contact structures of substantially rectangular shape contact the at least six gate structures.

公开(公告)号：US20170317064A1

公开(公告)日：2017-11-02

申请号：US15651801

申请日：2017-07-17

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker

IPC分类号： H01L27/02 ,  H01L29/423 ,  H01L27/088 ,  H01L21/768 ,  G03F1/36 ,  H01L23/522 ,  H01L21/8234 ,  H01L23/528

CPC分类号： H01L27/0207 ,  G03F1/36 ,  H01L21/76816 ,  H01L21/76897 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L27/0203 ,  H01L27/088 ,  H01L29/42376 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2924/0001

摘要： A rectangular-shaped interlevel connection layout structure is defined to electrically connect a first layout structure in a first chip level with a second layout structure in a second chip level. The rectangular-shaped interlevel connection layout structure is defined by an as-drawn cross-section having at least one dimension larger than a corresponding dimension of either the first layout structure, the second layout structure, or both the first and second layout structures. A dimension of the rectangular-shaped interlevel connection layout structure can exceed a normal maximum size in one direction in exchange for a reduced size in another direction. The rectangular-shaped interlevel connection layout structure can be placed in accordance with a gridpoint of a virtual grid defined by two perpendicular sets of virtual lines. Also, the first and/or second layout structures can be spatially oriented and/or placed in accordance with one or both of the two perpendicular sets of virtual lines.

公开(公告)号：US20170186771A1

公开(公告)日：2017-06-29

申请号：US15457920

申请日：2017-03-13

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Michael C. Smayling

IPC分类号： H01L27/118 ,  H01L27/02 ,  H01L21/28

摘要： A first transistor has a gate electrode formed by a substantially linear portion of a first conductive structure. A second transistor has a gate electrode formed by a substantially linear portion of a second conductive structure. A third transistor has a gate electrode formed by a substantially linear portion of a third conductive structure. A fourth transistor has a gate electrode formed by a substantially linear portion of a fourth conductive structure. The substantially linear portions of the first, second, third, and fourth conductive structures extend in a first direction and are positioned in accordance with a gate pitch. Gate electrodes of the first and second transistors have a first size as measured in the first direction. Gate electrodes of the third and fourth transistors have a second size as measured in the first direction. The first size is at least two times the second size.

公开(公告)号：US20170104004A1

公开(公告)日：2017-04-13

申请号：US15385724

申请日：2016-12-20

申请人： Tela Innovations, Inc.

发明人： Jonathan R. Quandt ,  Scott T. Becker ,  Dhrumil Gandhi

IPC分类号： H01L27/118 ,  H01L23/528 ,  H01L27/02 ,  H01L21/8234

CPC分类号： H01L27/11803 ,  G06F17/5068 ,  H01L21/823475 ,  H01L23/528 ,  H01L27/0207 ,  H01L27/11807 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is disclosed to include a plurality of cells. Each of the cells has a respective outer cell boundary defined to circumscribe the cell in an orthogonal manner. Also, each of the cells includes circuitry for performing one or more logic functions. This circuitry includes a plurality of conductive features defined in one or more levels of the cell. One or more of the conductive features in at least one level of a given cell is an encroaching feature positioned to encroach by an encroachment distance into an exclusion zone. The exclusion zone occupies an area within the cell defined by an exclusion distance extending perpendicularly inward into the given cell from a first segment of the outer cell boundary. The exclusion distance is based on a design rule distance representing a minimum separation distance required between conductive features in adjacently placed cells on the semiconductor device.

公开(公告)号：US09536899B2

公开(公告)日：2017-01-03

申请号：US14945361

申请日：2015-11-18

申请人： Tela Innovations, Inc.

发明人： Scott T. Becker ,  Jim Mali ,  Carole Lambert

IPC分类号： G11C11/412 ,  H01L27/118 ,  H01L27/11 ,  G11C5/06 ,  H01L27/02 ,  H01L27/092 ,  G06F17/50 ,  H01L27/088 ,  H01L23/538 ,  H01L23/498 ,  H01L21/8234 ,  H01L23/528

CPC分类号： H01L27/11807 ,  G06F17/5068 ,  G06F17/5072 ,  G11C5/06 ,  G11C11/412 ,  H01L21/823475 ,  H01L23/49844 ,  H01L23/528 ,  H01L23/5386 ,  H01L27/0207 ,  H01L27/0218 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1052 ,  H01L27/11 ,  H01L27/1104 ,  H01L2027/11853 ,  H01L2027/11875 ,  H01L2027/11887 ,  H01L2924/0002 ,  H01L2924/00

摘要： A first conductive structure forms gate electrodes of a first transistor of a first transistor type and a first transistor of a second transistor type. A second conductive structure forms a gate electrode of a second transistor of the first transistor type. A third conductive structure forms a gate electrode of a second transistor of the second transistor type. A fourth conductive structure forms a gate electrode of a third transistor of the first transistor type. A fifth conductive structure forms a gate electrode of a third transistor of the second transistor type. A sixth conductive structure forms gate electrodes of a fourth transistor of the first transistor type and a fourth transistor of the second transistor type. The second and third transistors of the first transistor type and the second and third transistors of the second transistor type are electrically connected to form a cross-coupled transistor configuration.

摘要翻译： 第一导电结构形成第一晶体管类型的第一晶体管和第二晶体管类型的第一晶体管的栅电极。 第二导电结构形成第一晶体管类型的第二晶体管的栅电极。 第三导电结构形成第二晶体管类型的第二晶体管的栅电极。 第四导电结构形成第一晶体管类型的第三晶体管的栅电极。 第五导电结构形成第二晶体管类型的第三晶体管的栅电极。 第六导电结构形成第一晶体管类型的第四晶体管的栅电极和第二晶体管类型的第四晶体管。 第一晶体管类型的第二和第三晶体管和第二晶体管类型的第二和第三晶体管电连接以形成交叉耦合晶体管配置。