Antifuse structure for in line circuit modification
    3.
    发明授权
    Antifuse structure for in line circuit modification 有权
    线路电路改造的防腐结构

    公开(公告)号:US08367483B2

    公开(公告)日:2013-02-05

    申请号:US13360203

    申请日:2012-01-27

    IPC分类号: H01L21/82

    摘要: An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

    摘要翻译: 反熔丝结构和在反熔丝结构内形成接触的方法。 反熔丝结构包括具有上覆金属层的基板,形成在金属层的上表面上的电介质层,以及由通过电介质层蚀刻到金属层中的接触孔内的接触材料形成的接触。 接触通孔在接触通孔的底表面处包括金属材料,并且在金属材料的顶部上包​​括未处理或部分处理的金属前体。

    Antifuse structure for in line circuit modification
    4.
    发明授权
    Antifuse structure for in line circuit modification 有权
    线路电路改造的防腐结构

    公开(公告)号:US08125048B2

    公开(公告)日:2012-02-28

    申请号:US12574926

    申请日:2009-10-07

    IPC分类号: H01L29/00

    摘要: An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

    摘要翻译: 反熔丝结构和在反熔丝结构内形成接触的方法。 反熔丝结构包括具有上覆金属层的基板,形成在金属层的上表面上的电介质层,以及由通过电介质层蚀刻到金属层中的接触孔内的接触材料形成的接触。 接触通孔在接触通孔的底表面处包括金属材料,并且在金属材料的顶部上包​​括未处理或部分处理的金属前体。

    VOLTAGE SENSITIVE RESISTOR (VSR) READ ONLY MEMORY
    6.
    发明申请
    VOLTAGE SENSITIVE RESISTOR (VSR) READ ONLY MEMORY 失效
    电压敏感电阻(VSR)只读存储器

    公开(公告)号:US20120001140A1

    公开(公告)日:2012-01-05

    申请号:US12827197

    申请日:2010-06-30

    IPC分类号: H01L45/00 H01L21/02

    摘要: Disclosed is a voltage sensitive resistor (VSR) write once (WO) read only memory (ROM) device which includes a semiconductor device and a VSR connected to the semiconductor device. The VSR WO ROM device is a write once read only device. The VSR includes a CVD titanium nitride layer having residual titanium-carbon bonding such that the VSR is resistive as formed and can become less resistive by an order of 102, more preferably 103 and most preferably 104 when a predetermined voltage and current are applied to the VSR. A plurality of the VSR WO ROM devices may be arranged to form a high density programmable logic circuit in a 3-D stack. Also disclosed are methods to form the VSR WO ROM device.

    摘要翻译: 公开了一种包括半导体器件和连接到半导体器件的VSR的一次(WO)只读存储器(ROM)器件的电压敏感电阻(VSR)写入。 VSR WO ROM设备是一次写入只读设备。 VSR包括具有残留钛 - 碳键合的CVD氮化钛层,使得VSR是形成的电阻的,并且当预定的电压和电流被施加到电阻时,可以变得更小的电阻性为102,更优选为103,最优选为104。 VSR。 多个VSR WO ROM器件可以被布置成在3-D堆栈中形成高密度可编程逻辑电路。 还公开了形成VSR WO ROM器件的方法。

    Voltage sensitive resistor (VSR) read only memory
    7.
    发明授权
    Voltage sensitive resistor (VSR) read only memory 失效
    电压敏感电阻(VSR)只读存储器

    公开(公告)号:US08466443B2

    公开(公告)日:2013-06-18

    申请号:US12827197

    申请日:2010-06-30

    IPC分类号: H01L29/02

    摘要: Disclosed is a voltage sensitive resistor (VSR) write once (WO) read only memory (ROM) device which includes a semiconductor device and a VSR connected to the semiconductor device. The VSR WO ROM device is a write once read only device. The VSR includes a CVD titanium nitride layer having residual titanium-carbon bonding such that the VSR is resistive as formed and can become less resistive by an order of 102, more preferably 103 and most preferably 104 when a predetermined voltage and current are applied to the VSR. A plurality of the VSR WO ROM devices may be arranged to form a high density programmable logic circuit in a 3-D stack. Also disclosed are methods to form the VSR WO ROM device.

    摘要翻译: 公开了一种包括半导体器件和连接到半导体器件的VSR的一次(WO)只读存储器(ROM)器件的电压敏感电阻器(VSR)。 VSR WO ROM设备是一次写入只读设备。 VSR包括具有残留钛 - 碳键合的CVD氮化钛层,使得VSR是形成的电阻的,并且当预定的电压和电流被施加到电阻时,可以变得更小的电阻性为102,更优选为103,最优选为104。 VSR。 多个VSR WO ROM器件可以被布置成在3-D堆栈中形成高密度可编程逻辑电路。 还公开了形成VSR WO ROM器件的方法。

    ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION
    10.
    发明申请
    ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION 有权
    线路电路修改的抗结构

    公开(公告)号:US20110079874A1

    公开(公告)日:2011-04-07

    申请号:US12574926

    申请日:2009-10-07

    IPC分类号: H01L23/525 H01L21/768

    摘要: An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

    摘要翻译: 反熔丝结构和在反熔丝结构内形成接触的方法。 反熔丝结构包括具有上覆金属层的基板,形成在金属层的上表面上的电介质层,以及由通过电介质层蚀刻到金属层中的接触孔内的接触材料形成的接触。 接触通孔在接触通孔的底表面处包括金属材料,并且在金属材料的顶部上包​​括未处理或部分处理的金属前体。