Delta-Sigma Analog-to-Digital Converter Topology with Improved Distortion Performance
    3.
    发明申请
    Delta-Sigma Analog-to-Digital Converter Topology with Improved Distortion Performance 有权
    Delta-Sigma模数转换器拓扑,具有改进的失真性能

    公开(公告)号:US20160336956A1

    公开(公告)日:2016-11-17

    申请号:US15153384

    申请日:2016-05-12

    CPC classification number: H03M3/376 H03M3/344 H03M3/422 H03M3/452

    Abstract: A delta-sigma Analog-to-Digital Converter (ADC) (IC) which includes an input feed-forward path extending from an input to the ADC to a feed-forward summing circuit disposed between a loop filter and quantizer of the ADC, and a filter disposed in the feed-forward path as an apparatus for improving distortion performance in the delta-sigma ADC. The filter may be a low pass filter, for example, a Resistor-Capacitor (RC) circuit. The filter may have a cut-off frequency outside the ADC's passband. The filtering provided may be continuous-time filtering, even if the delta-sigma ADC is a discrete-time delta-sigma ADC.

    Abstract translation: 一种Δ-Σ模数转换器(ADC),其包括从输入到ADC延伸到设置在ADC的环路滤波器和量化器之间的前馈求和电路的输入前馈路径,以及 布置在前馈路径中的滤波器作为用于改进Δ-ΣADC中的失真性能的装置。 滤波器可以是低通滤波器,例如电阻 - 电容(RC)电路。 滤波器可能在ADC通带外部具有截止频率。 所提供的滤波可以是连续时间滤波,即使Δ-ΣADC是离散时间Δ-ΣADC。

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