公开(公告)号：US08710656B2

公开(公告)日：2014-04-29

申请号：US13553882

申请日：2012-07-20

申请人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05093 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/0603 ,  H01L2224/0614 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/14104 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： An integrated circuit (IC) chip is disclosed including a plurality of metal vertical interconnect accesses (vias) in a back end of line (BEOL) layer, a redistribution layer (RDL) on the BEOL layer, the BEOL layer having a plurality of bond pads, each bond pad connected to at least one corresponding metal via through the RDL; and a solder bump connected to each bond pad, wherein each solder bump is laterally offset from the corresponding metal via connected to the bond pad towards a center of the IC chip by an offset distance, wherein the offset distance is non-uniform across the IC chip. In one embodiment, the offset distance for each solder bump is proportionate to a distance between the center of the IC chip and the center of the corresponding solder bump pad structure for that solder bump.

摘要翻译： 公开了一种集成电路（IC）芯片，其包括在后端（BEOL）层中的多个金属垂直互连访问（通孔），BEOL层上的再分配层（RDL），BEOL层具有多个键 焊盘，每个接合焊盘通过RDL连接到至少一个对应的金属通孔; 以及连接到每个接合焊盘的焊料凸块，其中每个焊料凸块横向偏离连接到所述接合焊盘的相应金属通孔朝向所述IC芯片的中心偏移距离，其中所述偏移距离在所述IC 芯片。 在一个实施例中，每个焊料凸块的偏移距离与IC芯片的中心与该焊料凸块的相应焊料凸块焊盘结构的中心之间的距离成比例。

公开(公告)号：US20140021600A1

公开(公告)日：2014-01-23

申请号：US13553882

申请日：2012-07-20

申请人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Brian M. Erwin ,  Jeffrey P. Gambino ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/488 ,  H01L21/768

CPC分类号： H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05093 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/0603 ,  H01L2224/0614 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/14104 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： An integrated circuit (IC) chip is disclosed including a plurality of metal vertical interconnect accesses (vias) in a back end of line (BEOL) layer, a redistribution layer (RDL) on the BEOL layer, the BEOL layer having a plurality of bond pads, each bond pad connected to at least one corresponding metal via through the RDL; and a solder bump connected to each bond pad, wherein each solder bump is laterally offset from the corresponding metal via connected to the bond pad towards a center of the IC chip by an offset distance, wherein the offset distance is non-uniform across the IC chip. In one embodiment, the offset distance for each solder bump is proportionate to a distance between the center of the IC chip and the center of the corresponding solder bump pad structure for that solder bump.

摘要翻译： 公开了一种集成电路（IC）芯片，其包括在后端（BEOL）层中的多个金属垂直互连访问（通孔），BEOL层上的再分配层（RDL），BEOL层具有多个键 焊盘，每个接合焊盘通过RDL连接到至少一个对应的金属通孔; 以及连接到每个接合焊盘的焊料凸块，其中每个焊料凸块横向偏离连接到所述接合焊盘的相应金属通孔朝向所述IC芯片的中心偏移距离，其中所述偏移距离在所述IC 芯片。 在一个实施例中，每个焊料凸块的偏移距离与IC芯片的中心与该焊料凸块的相应焊料凸块焊盘结构的中心之间的距离成比例。

公开(公告)号：US08492892B2

公开(公告)日：2013-07-23

申请号：US12963139

申请日：2010-12-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/48 ,  H01L29/40 ,  H01L23/28

CPC分类号： H01L24/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/051 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/01027 ,  H01L2924/00 ,  H01L2224/05552

摘要： Solder bump connections and methods for fabricating solder bump connections. The method includes forming a layer stack containing first and second conductive layers, forming a dielectric passivation layer on a top surface of the second conductive layer, and forming a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer. The method further includes forming a conductive plug in the via opening. The solder bump connection includes first and second conductive layers comprised of different conductors, a dielectric passivation layer on a top surface of the second conductive layer, a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer, and a conductive plug in the via opening.

摘要翻译： 焊接凸块连接和制造焊料凸点连接的方法。 该方法包括形成包含第一和第二导电层的层叠层，在第二导电层的顶表面上形成电介质钝化层，以及形成延伸穿过介电钝化层的通孔至第二导电层的顶表面。 该方法还包括在通孔开口中形成导电塞。 焊料凸点连接包括由不同导体组成的第一和第二导电层，在第二导电层的顶表面上的介电钝化层，延伸穿过介电钝化层到第二导电层顶表面的通孔，以及 导电塞在通孔开口中。

公开(公告)号：US20120146212A1

公开(公告)日：2012-06-14

申请号：US12963139

申请日：2010-12-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Ekta Misra ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  George J. Scott

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L24/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02126 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05016 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05094 ,  H01L2224/05096 ,  H01L2224/051 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/10126 ,  H01L2224/11 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/01027 ,  H01L2924/00 ,  H01L2224/05552

摘要： Solder bump connections and methods for fabricating solder bump connections. The method includes forming a layer stack containing first and second conductive layers, forming a dielectric passivation layer on a top surface of the second conductive layer, and forming a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer. The method further includes forming a conductive plug in the via opening. The solder bump connection includes first and second conductive layers comprised of different conductors, a dielectric passivation layer on a top surface of the second conductive layer, a via opening extending through the dielectric passivation layer to the top surface of the second conductive layer, and a conductive plug in the via opening.

摘要翻译： 焊接凸块连接和制造焊料凸块连接的方法。 该方法包括形成包含第一和第二导电层的层叠层，在第二导电层的顶表面上形成电介质钝化层，以及形成延伸穿过介电钝化层的通孔至第二导电层的顶表面。 该方法还包括在通孔开口中形成导电塞。 焊料凸点连接包括由不同导体组成的第一和第二导电层，在第二导电层的顶表面上的介电钝化层，延伸穿过介电钝化层到第二导电层顶表面的通孔，以及 导电塞在通孔开口中。

公开(公告)号：US20130234315A1

公开(公告)日：2013-09-12

申请号：US13414877

申请日：2012-03-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L22/30 ,  H01L22/12 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05558 ,  H01L2224/05568 ,  H01L2224/05584 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13028 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/01047 ,  H01L2924/01029

摘要： Structures and methods for detecting solder wetting of pedestal sidewalls. The structure includes a semiconductor wafer having an array of integrated circuit chips, each of the integrated circuit chips having an array of chip pedestals having respective chip solder columns on top of the chip pedestals, the pedestals spaced apart a first distance in a first direction and a spaced apart second distance in second direction perpendicular to the first direction; and at least one monitor structure disposed in different regions of the wafer from the integrated circuit chips, the monitor structure comprising at least a first pedestal and a first solder column on a top surface of the first pedestal and a second pedestal and a second solder column on a top surface of the second pedestal, the first and the second pedestals spaced apart a third distance, the third distance less than the first and the second distances.

摘要翻译： 用于检测基座侧壁焊料润湿的结构和方法。 该结构包括具有集成电路芯片阵列的半导体晶片，每个集成电路芯片具有芯片基座阵列，其具有位于芯片基座顶部的相应的芯片焊料柱，基座沿第一方向隔开第一距离;以及 在垂直于第一方向的第二方向上间隔开的第二距离; 以及设置在所述晶片与所述集成电路芯片的不同区域中的至少一个监视器结构，所述监视器结构至少包括在所述第一基座的顶表面上的第一基座和第一焊料柱，以及第二基座和第二焊接柱 在第二基座的顶表面上，第一和第二基座间隔第三距离，第三距离小于第一和第二距离。

公开(公告)号：US08513814B2

公开(公告)日：2013-08-20

申请号：US13098816

申请日：2011-05-02

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/48

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02126 ,  H01L2224/02141 ,  H01L2224/02145 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05664 ,  H01L2224/061 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/141 ,  H01L2224/14104 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

摘要： Structures are provided with raised buffer pads for solder bumps. Methods are also provided for forming the raised buffer pads for solder bumps. The method includes forming a raised localized buffer pad structure on a tensile side of a last metal layer of a solder bump connection. The raised localized buffer pad structure increases a height of a portion of a pad structure of the solder bump connection with respect to a compressive side of the last metal layer.

摘要翻译： 结构提供有用于焊料凸块的凸起缓冲垫。 还提供了用于形成用于焊料凸块的凸起缓冲垫的方法。 该方法包括在焊料凸块连接的最后金属层的拉伸侧上形成升高的局部缓冲垫结构。 凸起的局部缓冲垫结构相对于最后一个金属层的压缩侧增加焊料凸块连接的焊盘结构的一部分的高度。

公开(公告)号：US08373275B2

公开(公告)日：2013-02-12

申请号：US12021321

申请日：2008-01-29

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC分类号： H01L23/485

CPC分类号： H01L24/11 ,  H01L2224/02125 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/10126 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2224/05552

摘要： A fine pitch solder bump structure with a built-in stress buffer that is utilized in electronic packages, and a method of producing the fine pitch solder bump structure with built-in stress buffer. Employed is a very thick final passivation layer that is constituted of a polyimide as a so-called “cushion” for a minimal thickness of UBM (BLM) pad and solder material, while concurrently completely separating the resultingly produced polyimide islands, so that the polyimide material provides most of the physical height for the “standoff” of a modified C4 (controlled collapse chip connection) structure. In employing the polyimide material as the primary structural component of the vertical chip package interconnect in this particular inventive manner, the inherent stress buffering property of the polyimide material is utilized to full advantage by effectively reducing the high stresses encountered during chip manufacture processing steps, such as chip join, reflow, preconditioning and reliability thermal cycle stressing.

摘要翻译： 具有用于电子封装中的内置应力缓冲器的细间距焊料凸块结构以及具有内置应力缓冲器的细间距焊料凸块结构的制造方法。 采用非常厚的最终钝化层，其由作为UBM（BLM）焊盘和焊料材料的最小厚度的所谓的缓冲层的聚酰亚胺构成，同时完全分离得到的聚酰亚胺岛，使得聚酰亚胺材料提供 大部分物理高度用于修改C4（可控崩溃芯片连接）结构的对立。 在采用聚酰亚胺材料作为垂直芯片封装互连的主要结构部件时，通过有效降低芯片制造加工步骤中遇到的高应力，可以充分利用聚酰亚胺材料的固有应力缓冲性能， 作为芯片连接，回流，预处理和可靠性热循环应力。

公开(公告)号：US08299568B2

公开(公告)日：2012-10-30

申请号：US13028332

申请日：2011-02-16

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC分类号： H01L23/58

CPC分类号： H01L23/5258 ,  H01L23/5254 ,  H01L23/5256 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

摘要： A conductor-filled damage propagation barrier is formed extending into a low-k dielectric layer between a fuse and an adjacent circuit element for preventing propagation of damage during a fuse blow operation. Conductor material filling the damage propagation barrier is formed from the same conductor layer as that used to form an interconnect structure.

摘要翻译： 导体填充的损伤传播屏障形成为延伸到保险丝和相邻电路元件之间的低k电介质层，以防止在保险丝熔断操作期间传播损坏。 填充损伤传播屏障的导体材料由与用于形成互连结构的导体层相同的导体层形成。

公开(公告)号：US08198133B2

公开(公告)日：2012-06-12

申请号：US12458441

申请日：2009-07-13

申请人： Timothy H. Daubenspeck ,  Paul Fortier ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan

发明人： Timothy H. Daubenspeck ,  Paul Fortier ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  David L. Questad ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L21/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/03005 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05016 ,  H01L2224/05019 ,  H01L2224/05027 ,  H01L2224/05552 ,  H01L2224/05563 ,  H01L2224/05572 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/131 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： Controlled collapse chip connection (C4) structures and methods of manufacture, and more specifically to structures and methods to improve lead-free C4 interconnect reliability. A structure includes a ball limited metallization (BLM) layer and a controlled collapse chip connection (C4) solder ball formed on the BLM layer. Additionally, the structure includes a final metal pad layer beneath the BLM layer and a cap layer beneath the final metal pad layer. Furthermore, the structure includes an air gap formed beneath the C4 solder ball between the final metal pad layer and one of the BLM layer and the cap layer.

摘要翻译： 控制崩溃芯片连接（C4）结构和制造方法，更具体地说是提高无铅C4互连可靠性的结构和方法。 一种结构包括球限制金属化（BLM）层和形成在BLM层上的受控崩溃芯片连接（C4）焊球。 此外，该结构包括在BLM层下面的最终金属垫层和在最终金属垫层下面的盖层。 此外，该结构包括在最终金属焊盘层和BLM层和盖层之一内的C4焊球之下形成的气隙。

公开(公告)号：US20120139113A1

公开(公告)日：2012-06-07

申请号：US12959697

申请日：2010-12-03

申请人： Charles L. Arvin ,  Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

发明人： Charles L. Arvin ,  Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC分类号： H01L23/48 ,  H01L21/3205

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/02126 ,  H01L2224/0361 ,  H01L2224/0382 ,  H01L2224/03912 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/11912 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method of making a semiconductor structure includes patterning a barrier layer metallurgy (BLM) which forms an undercut beneath a solder material, and forming a repair material in the undercut and on the solder material. The method also includes removing the repair material from the solder material, and reflowing the solder material.

摘要翻译： 制造半导体结构的方法包括图案化在焊料材料下形成底切的阻挡层冶金（BLM），以及在底切和焊料材料上形成修复材料。 该方法还包括从焊料材料中去除修复材料，以及回流焊料。