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    Antifuse for use with low &kgr; dielectric foam insulators
    1.
    发明授权
    Antifuse for use with low &kgr; dielectric foam insulators 失效
    用于低kappa电介质泡沫绝缘子的防腐剂

    公开(公告)号：US06835973B2

    公开(公告)日：2004-12-28

    申请号：US10159573

    申请日：2002-05-31

    申请人： Timothy H. Daubenspeck ,  William A. Klaasen ,  William T. Motsiff ,  Rosemary A. Previti-Kelly ,  Jed H. Rankin

    发明人： Timothy H. Daubenspeck ,  William A. Klaasen ,  William T. Motsiff ,  Rosemary A. Previti-Kelly ,  Jed H. Rankin

    IPC分类号： H01L2710

    CPC分类号： H01L23/5254 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A fusible link for a semiconductor device comprises an insulating substrate and a conductive line pair on the surface of the insulating substrate, with the conductive line pair having spaced ends. A polymer is disposed over the insulating substrate and between the conductive line pair ends. The polymer is capable of being changed from a non-conductive to a conductive state upon exposure to an energy beam. Preferably, the polymer comprises a polyimide, more preferably, a polymer/onium salt mixture, most preferably, a polyaniline polymer doped with a triphenylsufonium salt. The link may further comprise a low &kgr; nanopore/nanofoam dielectric material adjacent the conductive line ends.

    摘要翻译： 用于半导体器件的可熔连接件包括在绝缘衬底的表面上的绝缘衬底和导电线对，导电线对具有间隔开的端部。 聚合物设置在绝缘基板之上和导线对端之间。 聚合物能够在暴露于能量束时从非导电状态改变为导电状态。 优选地，聚合物包括聚酰亚胺，更优选聚合物/鎓盐混合物，最优选掺杂有三苯基鎓盐的聚苯胺聚合物。 该连接可以进一步包括邻近导线末端的低kappa纳米孔/纳米电流介电材料。

    Antifuse for use with low k dielectric foam insulators
    2.
    发明授权
    Antifuse for use with low k dielectric foam insulators 失效
    用于低k电介质泡沫绝缘子的防腐剂

    公开(公告)号：US06458630B1

    公开(公告)日：2002-10-01

    申请号：US09417853

    申请日：1999-10-14

    申请人： Timothy H. Daubenspeck ,  William A. Klaasen ,  William T. Motsiff ,  Rosemary A. Previti-Kelly ,  Jed H. Rankin

    发明人： Timothy H. Daubenspeck ,  William A. Klaasen ,  William T. Motsiff ,  Rosemary A. Previti-Kelly ,  Jed H. Rankin

    IPC分类号： H01L2128

    CPC分类号： H01L23/5254 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A fusible link for a semiconductor device comprises an insulating substrate and a conductive line pair on the surface of the insulating substrate, with the conductive line pair having spaced ends. A polymer is disposed over the insulating substrate and between the conductive line pair ends. The polymer is capable of being changed from a non-conductive to a conductive state upon exposure to an energy beam. Preferably, the polymer comprises a polyimide, more preferably, a polymer/onium salt mixture, most preferably, a polyaniline polymer doped with a triphenylsufonium salt. The link may further comprise a low k nanopore/nanofoam dielectric material adjacent the conductive line ends.

    摘要翻译： 用于半导体器件的可熔连接件包括在绝缘衬底的表面上的绝缘衬底和导电线对，导电线对具有间隔开的端部。 聚合物设置在绝缘基板之上和导线对端之间。 聚合物能够在暴露于能量束时从非导电状态改变为导电状态。 优选地，聚合物包括聚酰亚胺，更优选聚合物/鎓盐混合物，最优选掺杂有三苯基鎓盐的聚苯胺聚合物。 该连接可以进一步包括邻近导电线端部的低k纳米孔/纳米空间电介质材料。

    Semiconductor chip structures with embedded thermal conductors and a thermal sink disposed over opposing substrate surfaces
    5.
    发明授权
    Semiconductor chip structures with embedded thermal conductors and a thermal sink disposed over opposing substrate surfaces 失效
    具有嵌入式热导体的半导体芯片结构和设置在相对基板表面上的散热器

    公开(公告)号：US06773952B2

    公开(公告)日：2004-08-10

    申请号：US10243397

    申请日：2002-09-12

    申请人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

    发明人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

    IPC分类号： H01L2100

    CPC分类号： H01L23/5222 ,  H01L23/3677 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

    摘要： Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate. The thermal sink includes one or more thermally conductive via structures embedded within the substrate and aligned to thermally contact to the cooling posts disposed above the substrate.

    摘要翻译： 半导体芯片结构设置有用于从一个或多个导电电路构件去除热量的嵌入式热导体，其中电路构件形成在衬底上方的一个或多个电介质层上，每层具有低介电常数和低热导率 。 一个或多个冷却柱，例如多个导热塞，被选择性地设置在半导体芯片结构内邻近一个或多个导电构件并与其热耦合，使得由构件产生的热量被传送到冷却柱中并通过冷却柱 转移到衬底和/或到半导体芯片结构的上表面。 衬底的背面具有热耦合到其上并与衬底电隔离的散热器。 散热器包括一个或多个热传导通孔结构，其嵌入衬底内并对准以与设置在衬底上方的冷却柱热接触。

    Semiconductor chip structures with embedded thermal conductors and a thermal sink disposed over opposing substrate surfaces
    6.
    发明授权
    Semiconductor chip structures with embedded thermal conductors and a thermal sink disposed over opposing substrate surfaces 失效
    具有嵌入式热导体的半导体芯片结构和设置在相对基板表面上的散热器

    公开(公告)号：US06512292B1

    公开(公告)日：2003-01-28

    申请号：US09660270

    申请日：2000-09-12

    申请人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

    发明人： Douglas S. Armbrust ,  William F. Clark ,  William A. Klaasen ,  William T. Motsiff ,  Timothy D. Sullivan

    IPC分类号： H01L2312

    CPC分类号： H01L23/5222 ,  H01L23/3677 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

    摘要： Semiconductor chip structures are provided with embedded thermal conductors for removing heat from one or more electrically conductive circuit members thereof, wherein the circuit members are formed on one or more dielectric layers above a substrate, each layer having a low dielectric constant and a low thermal conductivity. One or more cooling posts, for example, multiple thermally conductive plugs, are selectively disposed within the semiconductor chip structure adjacent to one or more electrically conductive members and thermally coupled thereto so that heat produced by the members is transferred into and through the cooling posts for forwarding to the substrate and/or to an upper surface of the semiconductor chip structure. The backside of the substrate has a thermal sink thermally coupled thereto and electrically isolated from the substrate. The thermal sink includes one or more thermally conductive via structures embedded within the substrate and aligned to thermally contact to the cooling posts disposed above the substrate.

    摘要翻译： 半导体芯片结构设置有用于从一个或多个导电电路构件去除热量的嵌入式热导体，其中电路构件形成在衬底上方的一个或多个电介质层上，每层具有低介电常数和低热导率 。 一个或多个冷却柱，例如多个导热塞，被选择性地设置在半导体芯片结构内邻近一个或多个导电构件并与其热耦合，使得由构件产生的热量被传送到冷却柱中并通过冷却柱 转移到衬底和/或到半导体芯片结构的上表面。 衬底的背面具有热耦合到其上并与衬底电隔离的散热器。 散热器包括一个或多个热传导通孔结构，其嵌入衬底内并对准以与设置在衬底上方的冷却柱热接触。

    Alignment mark structure for laser fusing and method of use
    7.
    发明授权
    Alignment mark structure for laser fusing and method of use 失效
    激光熔接对准标记结构及其使用方法

    公开(公告)号：US06661106B1

    公开(公告)日：2003-12-09

    申请号：US10218881

    申请日：2002-08-13

    申请人： Richard A. Gilmour ,  William A. Klaasen ,  William T. Motsiff

    发明人： Richard A. Gilmour ,  William A. Klaasen ,  William T. Motsiff

    IPC分类号： H01L23544

    CPC分类号： H01L23/5258 ,  H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention relates to an alignment mark structure for laser fusing. An alignment mark structure is formed which is comprised of image elements that are placed on different film layers in a semiconductor device. Alignment is accomplished by examining the difference in reflected energy of a laser beam as the beam traverses the alignment mark structure. By forming the alignment mark structure such that it has elements on different film layers, the reflected energy can be modulated to avoid the situation in which no difference in reflected energy is found, which would make the alignment mark invisible to the laser fusing tool. A method of applying the alignment mark structure is also disclosed.

    摘要翻译： 本发明涉及用于激光熔合的对准标记结构。 形成对准标记结构，其包括放置在半导体器件中的不同膜层上的图像元素。 通过检查当光束穿过对准标记结构时激光束的反射能量的差异来实现对准。 通过形成对准标记结构使得其在不同的膜层上具有元件，可以调制反射能量以避免发现反射能量差异的情况，这将使激光熔合工具不可见对准标记。 还公开了应用对准标记结构的方法。

    Error correcting logic system
    8.
    发明授权
    Error correcting logic system 有权
    错误校正逻辑系统

    公开(公告)号：US07642813B2

    公开(公告)日：2010-01-05

    申请号：US11850857

    申请日：2007-09-06

    申请人： Kerry Bernstein ,  Philip G. Emma ,  John A. Fifield ,  Paul D. Kartschoke ,  William A. Klaasen ,  Norman J. Rohrer

    发明人： Kerry Bernstein ,  Philip G. Emma ,  John A. Fifield ,  Paul D. Kartschoke ,  William A. Klaasen ,  Norman J. Rohrer

    IPC分类号： H03K19/20 ,  H03K19/094 ,  H03K19/003

    CPC分类号： H03K19/007

    摘要： The invention includes an error correcting logic system that allows critical circuits to be hardened with only one redundant unit and without loss of circuit performance. The system provides an interconnecting gate that suppresses a fault in one of at least two redundant dynamic logic gates that feed to the interconnecting gate. The system is applicable to dynamic or static logic systems. The system prevents propagation of a fault, and addresses not only soft errors, but noise-induced errors. Also, there is provided a design structure embodied in a machine readable medium used in a design process, and which includes such error correcting logic system.

    摘要翻译： 本发明包括纠错逻辑系统，其允许仅使用一个冗余单元来硬化关键电路并且不损失电路性能。 该系统提供互连门，其抑制馈送到互连门的至少两个冗余动态逻辑门之一的故障。 该系统适用于动态或静态逻辑系统。 该系统防止故障传播，不仅解决软错误，而且还会引起噪声引起的错误。 此外，提供了在设计过程中使用的机器可读介质中体现的设计结构，并且包括这种纠错逻辑系统。

    System technique for detecting soft errors in statically coupled CMOS logic
    9.
    发明授权
    System technique for detecting soft errors in statically coupled CMOS logic 失效
    用于检测静态耦合CMOS逻辑中的软错误的系统技术

    公开(公告)号：US06453431B1

    公开(公告)日：2002-09-17

    申请号：US09346509

    申请日：1999-07-01

    申请人： Kerry Bernstein ,  Andres Bryant ,  William A. Klaasen ,  Wilbur David Pricer

    发明人： Kerry Bernstein ,  Andres Bryant ,  William A. Klaasen ,  Wilbur David Pricer

    IPC分类号： G06K504

    CPC分类号： G11C5/005 ,  G06F11/00

    摘要： Circuit for detecting error transients in logic circuits due to atomic events or other non-recurring noise sources includes a first circuit coupled to a data line for sensing a first signal on the data line at a first point in time (T1) and a second circuit coupled to the data line for sensing the first signal on the data line at a second point in time (T2) such that a time difference between T1 and T2 is small enough so that the first signal is still present on the data line in the absence of a perturbation event and such that the time difference between T1 and T2 is large enough so that any such perturbation event is resolved. A compare circuit coupled to the first and second circuits compares the sensing of the first signal by the first and second circuits, and generates an error signal in response to a non-compare.

    摘要翻译： 用于检测由于原子事件或其他非循环噪声源引起的逻辑电路中的错误瞬变的电路包括耦合到数据线的第一电路，用于感测在第一时间点（T1）的数据线上的第一信号，以及第二电路 耦合到数据线，用于在第二时间点（T2）感测数据线上的第一信号，使得T1和T2之间的时间差足够小，使得第一信号在不存在的情况下仍然存在于数据线上 的扰动事件，并且使得T1和T2之间的时间差足够大，使得任何这样的扰动事件被解决。 耦合到第一和第二电路的比较电路比较第一和第二电路对第一信号的感测，并且响应于非比较而产生误差信号。

    Radiation detecting system
    10.
    发明授权
    Radiation detecting system 失效
    辐射检测系统

    公开(公告)号：US06969859B2

    公开(公告)日：2005-11-29

    申请号：US10249872

    申请日：2003-05-14

    申请人： William A. Klaasen ,  Edward J. Nowak ,  Norman J. Rohrer

    发明人： William A. Klaasen ,  Edward J. Nowak ,  Norman J. Rohrer

    IPC分类号： G01T1/15 ,  G01T1/17 ,  G01T1/24

    CPC分类号： G01T1/17

    摘要： A radiation detecting system including a radiation detecting section having one or more radiation detecting circuits and a circuit adjustment section for adjusting other circuitry to be protected. Radiation detecting circuits are provided to detect a pulse of radiation and/or a total radiation dose accumulation.

    摘要翻译： 一种辐射检测系统，包括具有一个或多个辐射检测电路的辐射检测部分和用于调节要被保护的其它电路的电路调整部分。 提供辐射检测电路以检测辐射脉冲和/或总辐射剂量累积。