利索-全球专利检索

  1. Login
  2. Sign Up

Search Results

83 records (took 0.019 seconds)

    Method for mitigating lateral film growth in area selective deposition
    1.
    发明授权
    Method for mitigating lateral film growth in area selective deposition 有权

    公开(公告)号：US11804376B2

    公开(公告)日：2023-10-31

    申请号：US16930842

    申请日：2020-07-16

    Applicant: Tokyo Electron Limited

    Inventor： Kandabara N. Tapily

    IPC: H01L21/285 ,  H01L21/02

    CPC classification number: H01L21/28562 ,  H01L21/0228 ,  H01L21/02304

    Abstract: A substrate processing method for area selective deposition includes providing a substrate containing a first film, a second film, and a third film, forming a first blocking layer on the first film, forming a second blocking layer on the second film, where the second blocking layer is different from the first blocking layer, and selectively forming a material film on the third film. In one example, the first film contains a metal film, second film contains a metal-containing liner that surrounds the metal film, and the third film includes a dielectric film that surrounds the metal-containing liner.

    METHOD OF SELECTIVELY FORMING METAL SILICIDES FOR SEMICONDUCTOR DEVICES
    3.
    发明申请
    METHOD OF SELECTIVELY FORMING METAL SILICIDES FOR SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20200303195A1

    公开(公告)日：2020-09-24

    申请号：US16823071

    申请日：2020-03-18

    Applicant: Tokyo Electron Limited

    Inventor： Kandabara N. Tapily

    IPC: H01L21/285 ,  H01L21/8238

    Abstract: A substrate processing method includes providing a substrate containing a first semiconductor material and a second semiconductor material, treating the first semiconductor material and the second semiconductor material with a chemical source that selectively forms a chemical layer on the second semiconductor material relative to the first semiconductor material, and exposing the substrate to a first metal-containing precursor that selectively deposits a first metal-containing layer on the first semiconductor material relative to the chemical layer on the second semiconductor material. The method can further include annealing the substrate to react the first metal-containing layer with the first semiconductor material to form a first metal silicide layer, removing the chemical layer from the second semiconductor material, depositing a second metal-containing layer on the second semiconductor material, and annealing the substrate to react the second metal-containing layer with the second semiconductor material to form a second metal silicide layer.

    DUAL METAL WRAP-AROUND CONTACTS FOR SEMICONDUCTOR DEVICES
    4.
    发明申请
    DUAL METAL WRAP-AROUND CONTACTS FOR SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20200279942A1

    公开(公告)日：2020-09-03

    申请号：US16803987

    申请日：2020-02-27

    Applicant: Tokyo Electron Limited

    Inventor： Hiroaki Niimi ,  Kandabara N. Tapily ,  Takahiro Hakamata

    IPC: H01L29/78 ,  H01L21/768 ,  H01L21/285 ,  H01L21/762 ,  H01L29/417 ,  H01L29/66

    Abstract: A semiconductor device includes a first raised feature in a NFET region on a substrate, a first n-type doped epitaxial semiconductor material grown on the first raised feature, the first n-type doped epitaxial material having a first upward facing surface and a first downward facing surface, a first contact metal on the first downward facing surface, and a second contact metal on the first upward facing surface. The device further includes a second raised feature in a PFET region on the substrate, a second p-type doped epitaxial semiconductor material grown on the second raised feature, the second p-type doped epitaxial material having a second upward facing surface and a second downward facing surface, a third contact metal on the second downward facing surface, and a fourth contact metal on the second upward facing surface, wherein the fourth contact metal is different from the second contact metal.

    METHOD OF FORMING CRYSTALLOGRAPHICALLY STABILIZED FERROELECTRIC HAFNIUM ZIRCONIUM BASED FILMS FOR SEMICONDUCTOR DEVICES
    5.
    发明申请
    METHOD OF FORMING CRYSTALLOGRAPHICALLY STABILIZED FERROELECTRIC HAFNIUM ZIRCONIUM BASED FILMS FOR SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20200035493A1

    公开(公告)日：2020-01-30

    申请号：US16522993

    申请日：2019-07-26

    Applicant: Tokyo Electron Limited

    Inventor： Robert D. Clark ,  Kandabara N. Tapily

    IPC: H01L21/28 ,  H01L29/51 ,  H01L29/66

    Abstract: A method of forming crystallographically stabilized ferroelectric hafnium zirconium based films for semiconductor devices is described. The hafnium zirconium based films can be either doped or undoped. The method includes depositing a hafnium zirconium based film with a thickness greater than 5 nanometers on a substrate, depositing a cap layer on the hafnium zirconium based film, heat-treating the substrate to crystallize the hafnium zirconium based film in a non-centrosymmetric orthorhombic phase, a tetragonal phase, or a mixture thereof. The method further includes removing the cap layer from the substrate, thinning the heat-treated hafnium zirconium based film to a thickness of less than 5 nanometers, where the thinned heat-treated hafnium zirconium based film maintains the crystallized non-centrosymmetric orthorhombic phase, the tetragonal phase, or the mixture thereof.

    Wrap-around contact integration scheme
    7.
    发明授权
    Wrap-around contact integration scheme 有权

    公开(公告)号：US10381448B2

    公开(公告)日：2019-08-13

    申请号：US15604399

    申请日：2017-05-24

    Applicant: Tokyo Electron Limited

    Inventor： Robert D. Clark ,  Kandabara N. Tapily

    IPC: H01L21/02 ,  H01L29/16 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L21/768 ,  H01L23/485 ,  H01L29/161 ,  H01L29/417

    Abstract: A wrap-around contact integration scheme is described that includes sidewall protection during contact formation. A substrate processing method includes providing a substrate containing a raised contact in a first dielectric film, and a second dielectric film on the first dielectric film, where the second dielectric film has a recessed feature with a sidewall and a bottom portion above the raised contact. The method further includes depositing a conformal film on the sidewall and on the bottom portion of the recessed feature, removing the conformal film from the bottom portion in a first anisotropic etching process, where the remaining conformal film forms a protection film on the sidewall and defines a width of the recessed feature, and forming a cavity containing the raised contact in an isotropic etching process, where a width of the cavity is greater than the width of the recessed feature.

    Selective film formation for raised and recessed features using deposition and etching processes
    8.
    发明授权
    Selective film formation for raised and recessed features using deposition and etching processes 有权

    公开(公告)号：US10381234B2

    公开(公告)日：2019-08-13

    申请号：US16175538

    申请日：2018-10-30

    Applicant: Tokyo Electron Limited

    Inventor： Kandabara N. Tapily

    IPC: H01L21/3065 ,  H01L21/67 ,  H01L21/308 ,  H01L29/06 ,  H01L21/02

    Abstract: Embodiments of the invention provide a processing method for selective film formation for raised and recessed features using deposition and etching processes. According to one embodiment, the method includes providing a substrate having a recessed feature with a sidewall and a bottom portion, and depositing a film in the recessed feature and on a field area around the opening of the recessed feature, where the film is non-conformally deposited with a greater film thickness on the bottom portion than on the sidewall and the field area. The method further includes etching the film in an atomic layer etching (ALE) process in the absence of a plasma, where the etching thins the film on the bottom portion and removes the film from the sidewall and the field area, and repeating the depositing and the etching at least once to increase the film thickness of on the bottom portion.

    Selective film formation for raised and recessed features using deposition and etching processes
    9.
    发明授权
    Selective film formation for raised and recessed features using deposition and etching processes 有权

    公开(公告)号：US10115601B2

    公开(公告)日：2018-10-30

    申请号：US15422128

    申请日：2017-02-01

    Applicant: Tokyo Electron Limited

    Inventor： Kandabara N. Tapily

    IPC: H01L21/308 ,  H01L21/3065 ,  H01L29/06 ,  H01L21/02

    Abstract: Embodiments of the invention provide a processing method for selective film formation for raised and recessed features using deposition and etching processes. According to one embodiment, the method includes providing a substrate having a recessed feature with a sidewall and a bottom portion, and depositing a film in the recessed feature and on a field area around the opening of the recessed feature, where the film is non-conformally deposited with a greater film thickness on the bottom portion than on the sidewall and the field area. The method further includes etching the film in an atomic layer etching (ALE) process in the absence of a plasma, where the etching thins the film on the bottom portion and removes the film from the sidewall and the field area, and repeating the depositing and the etching at least once to increase the film thickness of on the bottom portion.

Patent Agency Ranking