Substrate with top-flattened solder bumps and method for manufacturing the same
    4.
    发明授权
    Substrate with top-flattened solder bumps and method for manufacturing the same 有权
    具有顶部扁平焊料凸块的基板及其制造方法

    公开(公告)号:US06719185B2

    公开(公告)日:2004-04-13

    申请号:US10180965

    申请日:2002-06-27

    申请人: Tomoe Suzuki

    发明人: Tomoe Suzuki

    IPC分类号: B23K3102

    摘要: A method for manufacturing a wiring substrate includes the steps of applying, through printing, solder paste onto a plurality of pads exposed from the main surface of the substrate; melting the applied solder paste through reflowing, so as to form substantially hemispherical solder bumps; and flattening top portions of the substantially hemispherical solder bumps through the pressing of a flat pressing surface against the top portions, thereby forming top-flattened solder bumps. A pad is classified as a first pad when the pad is located within a region above a solid layer, and as a second pad when the pad is located outside of this region. In the solder paste application step, the amount of solder paste applied onto each first pad is smaller than that of solder paste applied onto each second pad.

    摘要翻译: 制造布线基板的方法包括以下步骤:将焊膏印刷到从基板的主表面露出的多个焊盘上; 通过回流熔化所施加的焊膏,以便形成基本上半球形的焊料凸块; 并且通过将平坦的压制表面压靠在顶部上而平坦化基本上半球状的焊料凸块的顶部,从而形成顶部平坦的焊料凸块。 当垫位于固体层上方的区域内时,垫被分类为第一垫,以及当垫位于该区的外部时作为第二垫。 在焊膏施加步骤中,施加到每个第一焊盘上的焊膏的量小于施加到每个第二焊盘上的焊膏的量。

    Substrate with top-flattened solder bumps and method for manufacturing the same
    5.
    发明授权
    Substrate with top-flattened solder bumps and method for manufacturing the same 失效
    具有顶部扁平焊料凸块的基板及其制造方法

    公开(公告)号:US06803658B2

    公开(公告)日:2004-10-12

    申请号:US10755379

    申请日:2004-01-13

    申请人: Tomoe Suzuki

    发明人: Tomoe Suzuki

    IPC分类号: H01L2348

    摘要: A wiring substrate includes a solid layer formed on the core substrate to partially cover the same. At least one resin dielectric layer is formed on the solid layer and the core substrate while a plurality of pads are formed on the resin dielectric layer and are exposed at the main surface of the wiring substrate. First pads are located within a region above the solid layer and second pads located outside of that region. First top-flattened solder bumps are formed on the first pads and second top-flattened solder bumps are formed on the second pads. The bumps all include a top face of the same diameter.

    摘要翻译: 布线基板包括形成在芯基板上以部分地覆盖其的固体层。 在固体层和芯基板上形成至少一个树脂电介质层,同时在树脂电介质层上形成多个焊盘并在布线基板的主表面露出。 第一焊盘位于固体层上方的区域内,第二焊盘位于该区域的外部。 在第一焊盘上形成第一顶部扁平化的焊料凸块,并且在第二焊盘上形成第二顶部扁平化的焊料凸块。 这些凸块都包括相同直径的顶面。