公开(公告)号：US20120025200A1

公开(公告)日：2012-02-02

申请号：US13017498

申请日：2011-01-31

申请人： Tomonori Aoyama ,  Kiyotaka Miyano ,  Yusuke Oshiki

发明人： Tomonori Aoyama ,  Kiyotaka Miyano ,  Yusuke Oshiki

IPC分类号： H01L29/04 ,  H01L21/20

CPC分类号： H01L29/04 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02667

摘要： In one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include depositing a first amorphous film having a first impurity, depositing a third amorphous lower-layer film on the first amorphous film, forming microcrystals on the third amorphous lower-layer film, depositing a third amorphous upper-layer film on the third amorphous lower-layer film to cover the microcrystals, depositing a second amorphous film having a second impurity on the third amorphous upper-layer film, and radiating microwaves to crystallize the third amorphous lower-layer film and the third amorphous upper-layer film to form a third crystal layer, and crystallize the first amorphous film and the second amorphous film to form a first crystal layer and a second crystal layer.

摘要翻译： 在一个实施例中，公开了一种用于制造半导体器件的方法。 该方法可以包括沉积具有第一杂质的第一非晶膜，在第一非晶膜上沉积第三非晶下层膜，在第三非晶下层膜上形成微晶，在第三非晶下层膜上沉积第三非晶上层膜 非晶下层膜覆盖微晶，在第三非晶上层膜上沉积具有第二杂质的第二非晶膜，并且辐射微波以使第三非晶下层膜和第三非晶上层膜结晶以形成 第三晶体层，并且使第一非晶膜和第二非晶膜结晶以形成第一晶体层和第二晶体层。

公开(公告)号：US08383452B2

公开(公告)日：2013-02-26

申请号：US13017498

申请日：2011-01-31

申请人： Tomonori Aoyama ,  Kiyotaka Miyano ,  Yusuke Oshiki

发明人： Tomonori Aoyama ,  Kiyotaka Miyano ,  Yusuke Oshiki

IPC分类号： H01L21/00 ,  H01L31/0376

CPC分类号： H01L29/04 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02592 ,  H01L21/0262 ,  H01L21/02667

摘要： In one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include depositing a first amorphous film having a first impurity, depositing a third amorphous lower-layer film on the first amorphous film, forming microcrystals on the third amorphous lower-layer film, depositing a third amorphous upper-layer film on the third amorphous lower-layer film to cover the microcrystals, depositing a second amorphous film having a second impurity on the third amorphous upper-layer film, and radiating microwaves to crystallize the third amorphous lower-layer film and the third amorphous upper-layer film to form a third crystal layer, and crystallize the first amorphous film and the second amorphous film to form a first crystal layer and a second crystal layer.

摘要翻译： 在一个实施例中，公开了一种用于制造半导体器件的方法。 该方法可以包括沉积具有第一杂质的第一非晶膜，在第一非晶膜上沉积第三非晶下层膜，在第三非晶下层膜上形成微晶，在第三非晶下层膜上沉积第三非晶上层膜 非晶下层膜覆盖微晶，在第三非晶上层膜上沉积具有第二杂质的第二非晶膜，并且辐射微波以使第三非晶下层膜和第三非晶上层膜结晶以形成 第三晶体层，并且使第一非晶膜和第二非晶膜结晶以形成第一晶体层和第二晶体层。

公开(公告)号：US08759205B2

公开(公告)日：2014-06-24

申请号：US12883463

申请日：2010-09-16

申请人： Tomonori Aoyama ,  Yusuke Oshiki ,  Kiyotaka Miyano

发明人： Tomonori Aoyama ,  Yusuke Oshiki ,  Kiyotaka Miyano

IPC分类号： H01L29/66 ,  H01L21/20

CPC分类号： H01L21/20 ,  H01L29/66

摘要： According to one embodiment, a method for manufacturing a semiconductor device, wherein an amorphous semiconductor film comprising a microcrystal is annealed using a microwave, to crystallize the amorphous semiconductor film comprising the microcrystal using the microcrystal as a nucleus.

摘要翻译： 根据一个实施例，一种制造半导体器件的方法，其中使用微波对包含微晶的非晶半导体膜进行退火，以使用微晶作为核使包含微晶的非晶半导体膜结晶。

公开(公告)号：US20110215333A1

公开(公告)日：2011-09-08

申请号：US12883463

申请日：2010-09-16

申请人： Tomonori AOYAMA ,  Yusuke Oshiki ,  Kiyotaka Miyano

发明人： Tomonori AOYAMA ,  Yusuke Oshiki ,  Kiyotaka Miyano

IPC分类号： H01L29/66 ,  H01L21/20

CPC分类号： H01L21/20 ,  H01L29/66

摘要： According to one embodiment, a method for manufacturing a semiconductor device, wherein an amorphous semiconductor film comprising a microcrystal is annealed using a microwave, to crystallize the amorphous semiconductor film comprising the microcrystal using the microcrystal as a nucleus.

摘要翻译： 根据一个实施例，一种制造半导体器件的方法，其中使用微波对包含微晶的非晶半导体膜进行退火，以使用微晶作为核使包含微晶的非晶半导体膜结晶。

公开(公告)号：US20090309133A1

公开(公告)日：2009-12-17

申请号：US12483728

申请日：2009-06-12

申请人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

发明人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

IPC分类号： H01L29/04 ,  H01L21/20

CPC分类号： H01L21/823807 ,  H01L21/2686 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp(21541/T).

摘要翻译： 一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y <= 1E-5exp（21541 / T）的关系。

公开(公告)号：US07902030B2

公开(公告)日：2011-03-08

申请号：US12483728

申请日：2009-06-12

申请人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

发明人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

IPC分类号： H01L21/336

CPC分类号： H01L21/823807 ,  H01L21/2686 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp(21541/T).

摘要翻译： 一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y＆nlE; 1E-5exp（21541 / T）的关系。

公开(公告)号：US08377732B2

公开(公告)日：2013-02-19

申请号：US12887351

申请日：2010-09-21

申请人： Yusuke Oshiki ,  Kiyotaka Miyano

发明人： Yusuke Oshiki ,  Kiyotaka Miyano

IPC分类号： H01L21/00

CPC分类号： H01L27/14683 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14687

摘要： In one embodiment, a method of manufacturing a back side illuminated imaging device includes forming a semiconductor detection device and a peripheral circuit device on a semiconductor substrate, and bonding the semiconductor substrate onto a holding substrate via the semiconductor detection device and the peripheral circuit device. The method further includes removing the semiconductor substrate from the holding substrate to transfer the semiconductor detection device and the peripheral circuit device onto the holding substrate. The method further includes forming an amorphous semiconductor layer in which impurities are introduced, on the semiconductor detection device transferred onto the holding substrate, and annealing the amorphous semiconductor layer by using a microwave.

摘要翻译： 在一个实施例中，制造背面照明成像装置的方法包括在半导体衬底上形成半导体检测装置和外围电路装置，并且经由半导体检测装置和外围电路装置将半导体衬底接合到保持衬底上。 该方法还包括从保持基板移除半导体衬底以将半导体检测装置和外围电路装置传送到保持基板上。 该方法还包括在转移到保持基板上的半导体检测装置上形成其中引入杂质的非晶半导体层，以及通过使用微波对该非晶半导体层进行退火。

公开(公告)号：US08148717B2

公开(公告)日：2012-04-03

申请号：US12929504

申请日：2011-01-28

申请人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

发明人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L21/823807 ,  H01L21/2686 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp (21541/T).

摘要翻译： 一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y＆nlE; 1E-5exp（21541 / T）的关系。

公开(公告)号：US20110159634A1

公开(公告)日：2011-06-30

申请号：US12887351

申请日：2010-09-21

申请人： Yusuke Oshiki ,  Kiyotaka Miyano

发明人： Yusuke Oshiki ,  Kiyotaka Miyano

IPC分类号： H01L31/18

CPC分类号： H01L27/14683 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14687

摘要： In one embodiment, a method of manufacturing a back side illuminated imaging device includes forming a semiconductor detection device and a peripheral circuit device on a semiconductor substrate, and bonding the semiconductor substrate onto a holding substrate via the semiconductor detection device and the peripheral circuit device. The method further includes removing the semiconductor substrate from the holding substrate to transfer the semiconductor detection device and the peripheral circuit device onto the holding substrate. The method further includes forming an amorphous semiconductor layer in which impurities are introduced, on the semiconductor detection device transferred onto the holding substrate, and annealing the amorphous semiconductor layer by using a microwave.

摘要翻译： 在一个实施例中，制造背面照明成像装置的方法包括在半导体衬底上形成半导体检测装置和外围电路装置，并且经由半导体检测装置和外围电路装置将半导体衬底接合到保持衬底上。 该方法还包括从保持基板移除半导体衬底以将半导体检测装置和外围电路装置传送到保持基板上。 该方法还包括在转移到保持基板上的半导体检测装置上形成其中引入杂质的非晶半导体层，以及通过使用微波对该非晶半导体层进行退火。

公开(公告)号：US20110127578A1

公开(公告)日：2011-06-02

申请号：US12929504

申请日：2011-01-28

申请人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

发明人： Takayuki Ito ,  Yusuke Oshiki ,  Kouji Matsuo ,  Kenichi Yoshino ,  Takaharu Itani ,  Takuo Ohashi ,  Toshihiko Iinuma ,  Kiyotaka Miyano ,  Kunihiro Miyazaki

IPC分类号： H01L29/12

CPC分类号： H01L21/823807 ,  H01L21/2686 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp (21541/T).

摘要翻译： 一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y＆nlE; 1E-5exp（21541 / T）的关系。