公开(公告)号：US5598015A

公开(公告)日：1997-01-28

申请号：US357342

申请日：1994-12-15

申请人： Tomonori Tanoue ,  Hiroshi Masuda ,  Tohru Nakamura ,  Takahiro Onai ,  Katsuyoshi Washio

发明人： Tomonori Tanoue ,  Hiroshi Masuda ,  Tohru Nakamura ,  Takahiro Onai ,  Katsuyoshi Washio

IPC分类号： H01L29/205 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737 ,  H01L31/0328 ,  H01L27/082 ,  H01L31/0336

CPC分类号： H01L29/66318 ,  H01L29/7371

摘要： A hetero-junction bipolar transistor having an emitter composed of a semiconductor having a wider forbidden band width than that of a semiconductor constituting a base is disclosed. In the transistor, the emitter and the electrode leader area composed of a single crystalline semiconductor are provided being extended from the upper part of the emitter to the surface of the base through an insulating layer, for the purpose of making it possible to miniaturize the transistor and to operate the transistor at a high-speed by decreasing the emitter resistance.

摘要翻译： 公开了一种异质结双极晶体管，其具有由具有比构成基极的半导体宽的禁带宽度的半导体构成的发射极。 在晶体管中，由单晶半导体构成的发射极和电极引出区域通过绝缘层从发射极的上部延伸到基底的表面，以便使晶体管小型化 并通过降低发射极电阻来高速运行晶体管。

公开(公告)号：US5481120A

公开(公告)日：1996-01-02

申请号：US164801

申请日：1993-12-10

申请人： Kazuhiro Mochizuki ,  Tomoyoshi Mishima ,  Tohru Nakamura ,  Hiroshi Masuda ,  Tomonori Tanoue ,  Tooru Haga ,  Yoshihisa Fujisaki

发明人： Kazuhiro Mochizuki ,  Tomoyoshi Mishima ,  Tohru Nakamura ,  Hiroshi Masuda ,  Tomonori Tanoue ,  Tooru Haga ,  Yoshihisa Fujisaki

IPC分类号： H01L21/331 ,  H01L29/08 ,  H01L29/20 ,  H01L29/45 ,  H01L29/737 ,  H01L29/80 ,  H01S5/042 ,  H01S5/183 ,  H01S5/22 ,  H01S5/323 ,  H01L27/02

CPC分类号： H01S5/18347 ,  H01L29/0891 ,  H01L29/20 ,  H01L29/452 ,  H01L29/66318 ,  H01L29/7371 ,  H01S5/0424 ,  H01L29/802 ,  H01S2304/02 ,  H01S5/18341 ,  H01S5/18369 ,  H01S5/32316

摘要： Disclosed is a semiconductor device using a polycrystalline compound semiconductor with a low resistance as a low resistance layer, and its fabrication method. The above polycrystalline compound semiconductor layer is doped with C or Be as impurities in a large amount, and is extremely low in resistance. The polycrystalline compound semiconductor layer is formed by either of a molecular beam epitaxy method, an organometallic vapor phase epitaxy method and an organometallic molecular beam epitaxy method under the condition that a substrate temperature is 450.degree. C. or less and the ratio of partial pressure of a V-group element to a III-group element is 50 or more. In the case that the above polycrystaline compound semiconductor layer with a low resistance is used as an extrinsic base region of an heterojunction bipolar transistor, since the extrinsic base region can be formed on a dielectric film formed on a collector, it is possible to reduce the base-collector capacitance, and hence to enhance the operational speed of the heterojunction bipolar transistor.

摘要翻译： 公开了使用具有低电阻的多晶化合物半导体作为低电阻层的半导体器件及其制造方法。 上述多晶化合物半导体层以C或Be作为杂质被大量掺杂，并且电阻极低。 多晶化合物半导体层通过分子束外延法，有机金属气相外延法和有机金属分子束外延法中的任一种形成，在基板温度为450℃以下的条件下， 对于III族元素的V族元素为50以上。 在上述具有低电阻的多晶化合物半导体层用作异质结双极晶体管的外在基极区域的情况下，由于可以在形成在集电体上的电介质膜上形成非本征基区，因此可以减少 基极集电极电容，从而提高异质结双极晶体管的工作速度。

公开(公告)号：US5604835A

公开(公告)日：1997-02-18

申请号：US361681

申请日：1994-12-22

申请人： Tohru Nakamura ,  Tomonori Tanoue ,  Takeshi Kato ,  Mitsuo Takeda

发明人： Tohru Nakamura ,  Tomonori Tanoue ,  Takeshi Kato ,  Mitsuo Takeda

IPC分类号： G02B6/12 ,  G02B6/122 ,  G02B6/125 ,  G02B6/13 ,  G02B6/132 ,  G02B6/10

CPC分类号： G02B6/125 ,  G02B6/12004 ,  G02B6/122 ,  G02B6/132

摘要： An integrated optical waveguide device includes a substrate, and an optical waveguide which is formed in the form of projection or is formed in a trench formed in the substrate. Each optical waveguide has a first optical area made of a first optical material and a second optical area which is made of a second optical material and is surrounded by the first optical area. The optical waveguides are arranged on both side faces of the projection or trench.

摘要翻译： 集成光波导装置包括基板和形成为突起形状或形成在形成于基板中的沟槽中的光波导。 每个光波导具有由第一光学材料制成的第一光学区域和由第二光学材料制成并被第一光学区域包围的第二光学区域。 光波导布置在突起或沟槽的两个侧面上。

公开(公告)号：US5949097A

公开(公告)日：1999-09-07

申请号：US932939

申请日：1997-09-17

申请人： Koji Hirata ,  Tomonori Tanoue ,  Hiroshi Masuda ,  Hiroyuki Uchiyama ,  Kazuhiro Mochizuki

发明人： Koji Hirata ,  Tomonori Tanoue ,  Hiroshi Masuda ,  Hiroyuki Uchiyama ,  Kazuhiro Mochizuki

IPC分类号： H01L21/331 ,  H01L21/768 ,  H01L27/06 ,  H01L29/737 ,  H01L29/04

CPC分类号： H01L29/66318 ,  H01L27/0605 ,  H01L29/7371

摘要： The present invention relates to a contact structure not only for a semiconductor device having a hetero-junction bipolar transistor or a hetero-insulated gate field effect transistor but also for semiconductor devices at large. In a semiconductor layer of a polycrystalline or amorphous undoped III-V compound semiconductor or an alloy thereof, a through hole is formed for contact. The size of the through hole is set to permit exposure of at least part of a first conductor layer and a dielectric layer, such as an Si compound, present around the first conductor layer, and a second conductor layer is formed within the through hole so as to contact the first conductor layer. Since the semiconductor layer can be subjected to a selective dry etching for the dielectric layer, the dielectric layer is not etched at the time of forming the above through hole in the semiconductor layer. As a result an electric short-circuit of the second conductor layer with a single crystal semiconductor layer which underlies the dielectric layer can be prevented.

摘要翻译： 本发明涉及不仅具有异质结双极晶体管或异质绝缘栅场效应晶体管的半导体器件的接触结构，而且还涉及用于半导体器件的半导体器件。 在多晶或非晶未掺杂的III-V族化合物半导体的半导体层或其合金中，形成用于接触的通孔。 通孔的尺寸被设定为允许暴露在第一导体层周围的第一导体层和诸如Si化合物的电介质层的至少一部分，并且在通孔内形成第二导体层，因此 以接触第一导体层。 由于可以对半导体层进行电介质层的选择性干蚀刻，所以在形成半导体层中的上述通孔时不会蚀刻电介质层。 结果，可以防止具有位于电介质层下面的单晶半导体层的第二导体层的电短路。

公开(公告)号：US5017517A

公开(公告)日：1991-05-21

申请号：US518035

申请日：1990-05-02

申请人： Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chushirou Kusano ,  Hiroshi Masuda ,  Katsuhiko Mitani

发明人： Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chushirou Kusano ,  Hiroshi Masuda ,  Katsuhiko Mitani

IPC分类号： H01L29/73 ,  H01L21/20 ,  H01L21/28 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737 ,  H01L29/80

CPC分类号： H01L29/66318 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02491 ,  H01L21/02546 ,  H01L21/02639 ,  H01L21/28 ,  Y10S148/005 ,  Y10S148/011 ,  Y10S148/026 ,  Y10S438/976

摘要： A method for fabricating a semiconductor device comprises the steps of forming the first semiconductor layer on a semiconductor substrate, forming a surface protection layer of antimony (Sb) or the material having Sb as its main component, executing the other steps necessary for the fabrication of the semiconductor device, removing the surface protection layer, and forming, on the first semiconductor layer thus exposed, the second semiconductor layer.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成第一半导体层，形成锑（Sb）的表面保护层或具有Sb的材料作为其主要成分，执行制造所需的其它步骤 半导体器件，去除表面保护层，并且在由此暴露的第一半导体层上形成第二半导体层。

公开(公告)号：US20120208476A1

公开(公告)日：2012-08-16

申请号：US13451850

申请日：2012-04-20

申请人： Tomonori Tanoue ,  Hidetoshi Matsumoto

发明人： Tomonori Tanoue ,  Hidetoshi Matsumoto

IPC分类号： H04B1/04 ,  H04B1/034

CPC分类号： H03G3/3042 ,  H03F1/0261 ,  H03F3/191 ,  H03F3/24 ,  H03F2200/105 ,  H03F2200/207 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/471 ,  H03F2200/99

摘要： A high frequency power amplifier maintains an excellent linearity regardless of a fluctuation of a load impedance and is downsized. The high frequency power amplifier detects an AC voltage amplitude at an output terminal of a final amplification stage transistor, and suppresses an input signal amplitude of a power amplifier when the voltage amplitude exceeds a predetermined threshold value.

摘要翻译： 无论负载阻抗的波动如何，高频功率放大器保持良好的线性度，并且小型化。 高频功率放大器检测最终放大级晶体管的输出端的交流电压振幅，并且当电压振幅超过预定阈值时，抑制功率放大器的输入信号振幅。

公开(公告)号：US20070190962A1

公开(公告)日：2007-08-16

申请号：US11618207

申请日：2006-12-29

申请人： Kenji Sasaki ,  Tomonori Tanoue ,  Sakae Kikuchi ,  Toshifumi Makino ,  Takeshi Sato ,  Tsutomu Kobori ,  Yasunari Umemoto ,  Takashi Kitahara

发明人： Kenji Sasaki ,  Tomonori Tanoue ,  Sakae Kikuchi ,  Toshifumi Makino ,  Takeshi Sato ,  Tsutomu Kobori ,  Yasunari Umemoto ,  Takashi Kitahara

IPC分类号： H04B1/06 ,  H04B1/28 ,  H04B7/00

CPC分类号： H04B1/28 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L25/18 ,  H01L2223/6644 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in which an amplifier circuit is formed and a second semiconductor chip in which a control circuit for controlling the amplifier circuit is formed. A bonding pad over the second semiconductor chip is connected with a bonding pad over the first semiconductor chip directly by a wire without using a relay pad. In this regard, the bonding pad formed over the first semiconductor chip is not square but rectangular (oblong).

摘要翻译： 提供了一种技术，使得用于蜂窝电话等的RF模块的尺寸可以减小。 在构成RF模块的布线板上，设置有形成放大器电路的第一半导体芯片和形成用于控制放大器电路的控制电路的第二半导体芯片。 第二半导体芯片上的接合焊盘通过导线直接通过第一半导体芯片上的接合焊盘连接而不使用继电器垫。 在这方面，形成在第一半导体芯片上的焊盘不是正方形，而是矩形（长方形）。

公开(公告)号：US07184491B2

公开(公告)日：2007-02-27

申请号：US10655045

申请日：2003-09-05

申请人： May Suzuki ,  Satoshi Tanaka ,  Taizo Yamawaki ,  Tomonori Tanoue

发明人： May Suzuki ,  Satoshi Tanaka ,  Taizo Yamawaki ,  Tomonori Tanoue

IPC分类号： H04K1/02

CPC分类号： H03F3/24 ,  H03F1/02 ,  H03F1/0205 ,  H03F1/0227 ,  H03F1/32 ,  H03F2200/102 ,  H03F2200/324 ,  H03F2200/451 ,  H03F2200/504 ,  H03F2200/66 ,  H04B2001/045 ,  H04L27/20

摘要： A linear system and an EER system are used in combination such that the EER system can also be used in a cellular phone with a wide output dynamic range. In the EER system, linear control of an amplifier becomes difficult in a low output range. Thus, use of the EER system is limited to a high output range, and the linear system is used in the low output range as in the past. A power efficiency is improved while requirements of linearity are satisfied by this structure. An effective circuit structure is proposed for a switching control system for two systems. In addition, an up-converter is constituted in combination with a step-down element with high responsiveness, whereby a power supply voltage control circuit for the EER system with a wide control range and high responsiveness is provided.

摘要翻译： 线性系统和EER系统组合使用，使得EER系统也可以用在具有宽输出动态范围的蜂窝电话中。 在EER系统中，放大器的线性控制在低输出范围内变得困难。 因此，EER系统的使用被限制在高输出范围，并且线性系统如以往那样在低输出范围内使用。 通过这种结构满足线性要求，提高了功率效率。 提出了一种用于两个系统的开关控制系统的有效电路结构。 此外，上变频器与具有高响应性的降压元件组合构成，由此提供了具有宽控制范围和高响应性的EER系统的电源电压控制电路。

公开(公告)号：US20060081879A1

公开(公告)日：2006-04-20

申请号：US11247234

申请日：2005-10-12

申请人： Kenichi Tanaka ,  Hidetoshi Matsumoto ,  Isao Ohbu ,  Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chisaki Takubo ,  Hiroyuki Uchiyama

发明人： Kenichi Tanaka ,  Hidetoshi Matsumoto ,  Isao Ohbu ,  Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chisaki Takubo ,  Hiroyuki Uchiyama

IPC分类号： H01L31/109

CPC分类号： H01L23/482 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device which comprises active components, passive components, wiring lines and electrodes and are satisfactory in terms of mechanical strength, miniaturization and thermal stability. In the semiconductor device, openings are formed just below active components. These openings are filled with conductor layers. Conductor layers are also formed where openings are not formed.

摘要翻译： 本发明提供一种半导体器件，其包括有源部件，无源部件，布线和电极，并且在机械强度，小型化和热稳定性方面令人满意。 在半导体器件中，开口形成在活性部件的正下方。 这些开口填充有导体层。 还形成了未形成开口的导体层。

公开(公告)号：US06943387B2

公开(公告)日：2005-09-13

申请号：US10409455

申请日：2003-04-09

申请人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

发明人： Isao Ohbu ,  Tomonori Tanoue ,  Chushiro Kusano ,  Yasunari Umemoto ,  Atsushi Kurokawa ,  Kazuhiro Mochizuki ,  Masami Ohnishi ,  Hidetoshi Matsumoto

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/423 ,  H01L29/737 ,  H03F1/30 ,  H03F3/19 ,  H01L31/072

CPC分类号： H01L29/66318 ,  H01L29/0692 ,  H01L29/42304 ,  H01L29/7371 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16152 ,  H03F1/302 ,  H03F3/19 ,  H03F2203/21178

摘要： In a semiconductor device using an emitter top heterojunction bipolar transistor having a planar shape in a ring-like shape, a structure is provided in which a base electrode is present only on an inner side of a ring-like emitter-base junction region. This allows reduction of base/collector junction capacitance per unit emitter area, whereby a semiconductor device having high power adding efficiency and high power gain suitable for a power amplifier can be realized. Further, in a multistage power amplifier including first and second amplifier circuits each having one or more of bipolar transistors, a bipolar transistor in the first amplifier circuit uses an emitter having a planar shape in a rectangular shape, and a bipolar transistor in the second amplifier circuit uses an emitter having a ring-like shape and a base electrode only on the inner side of the emitter.

摘要翻译： 在使用具有环状形状的发射极顶面异质结双极晶体管的半导体器件中，提供了仅在环状发射极 - 基极结区域的内侧存在基极的结构。 这允许减小每单位发射极面积的基极/集电极结电容，由此可以实现具有高功率增加效率和适用于功率放大器的高功率增益的半导体器件。 此外，在包括具有一个或多个双极晶体管的第一和第二放大器电路的多级功率放大器中，第一放大器电路中的双极晶体管使用具有矩形形状的平面形状的发射极和第二放大器中的双极晶体管 电路仅在发射体的内侧使用具有环状形状的发射体和基极。