Semiconductor device structure facilitating electrostatic discharge protection and manufacturing method thereof
    1.
    发明申请
    Semiconductor device structure facilitating electrostatic discharge protection and manufacturing method thereof 审中-公开
    促进静电放电保护的半导体器件结构及其制造方法

    公开(公告)号:US20040217424A1

    公开(公告)日:2004-11-04

    申请号:US10837263

    申请日:2004-04-30

    Inventor: An Shih

    Abstract: A structure of a semiconductor device facilitating electrostatic discharge protection at least includes a source terminal, a drain terminal, and a gate terminal, wherein a portion of the source terminal and a portion of the drain terminal are overlapped above the gate terminal to increase the coupling capacitance so that the electrostatic discharge protection device can be turned on quickly. Accordingly the response of the electrostatic discharge protection device to an electrostatic discharge can be effectively promoted.

    Abstract translation: 促进静电放电保护的半导体器件的结构至少包括源极端子,漏极端子和栅极端子,其中源极端子的一部分和漏极端子的一部分重叠在栅极端子上方以增加耦合 电容,使静电放电保护装置能够快速打开。 因此,可以有效地促进静电放电保护装置对静电放电的响应。

    Low-temperature polysilicon thin film transistor having buried LDD structure and process for producing same
    2.
    发明申请
    Low-temperature polysilicon thin film transistor having buried LDD structure and process for producing same 失效
    具有埋入LDD结构的低温多晶硅薄膜晶体管及其制造方法

    公开(公告)号:US20040219741A1

    公开(公告)日:2004-11-04

    申请号:US10855542

    申请日:2004-05-27

    Inventor: An Shih

    CPC classification number: H01L29/66757 H01L29/78621

    Abstract: A low-temperature polysilicon thin film transistor having a buried LDD structure is provided. Two heavily doped regions are formed in a semiconductor layer and distributed just below a surface of the semiconductor layer. Two LDD regions are both sandwiched between the two heavily doped regions in a direction substantially parallel to the surface of semiconductor layer, and separated from the surface of the semiconductor layer by a portion of the semiconductor layer. The process for producing such a thin film transistor is also provided. A first, a second and a third doping materials are injected into a semiconductor layer in different directions to form heavily doped regions and LDD regions.

    LLD structure of thin film transistor
    3.
    发明申请
    LLD structure of thin film transistor 审中-公开
    薄膜晶体管的LLD结构

    公开(公告)号:US20040201067A1

    公开(公告)日:2004-10-14

    申请号:US10835651

    申请日:2004-04-30

    Inventor: An Shih

    Abstract: A thin film transistor having a single LDD structure with a halo structure is provided. The single LDD structure is disposed between source/drain structures, and having a first side adjacent to a first one of the source/drain structures and a second side spaced from a second one of the source/drain structures by essentially a semiconductor material. The halo structure is adjacent to the LDD structure partially or largely covering the LDD structure.

    Abstract translation: 提供了具有单一LDD结构的具有卤素结构的薄膜晶体管。 单个LDD结构设置在源极/漏极结构之间,并且具有与源极/漏极结构中的第一个相邻的第一侧和通过基本上半导体材料与源/漏极结构中的第二侧间隔开的第二侧。 卤素结构部分或大部分覆盖LDD结构与LDD结构相邻。

    Data arrangement for liquid crystal display device
    4.
    发明申请
    Data arrangement for liquid crystal display device 有权
    液晶显示装置的数据排列

    公开(公告)号:US20040080701A1

    公开(公告)日:2004-04-29

    申请号:US10681098

    申请日:2003-10-09

    Inventor: An Shih

    CPC classification number: G02F1/136286

    Abstract: A liquid crystal display (LCD) interface that includes a plurality of first transmission lines including N sets of transmission lines, each set of the first transmission lines being associated with a pixel formed in the LCD device, and a plurality of second transmission lines, each being coupled to one the plurality of first transmission lines, the plurality of second transmission lines including a plurality of sets, alternating in odd-numbered and even-numbered sets, each set of the second transmission lines corresponding to the plurality of first transmission lines, and each set including a plurality of subsets, each being associated with a pixel formed in the LCD device, wherein an M-th subset of each of the odd-numbered sets of the second transmission lines is coupled to an M-th set of the first transmission lines, and an M-th subset of each of the even-numbered sets of the second transmission lines is coupled to an (NnullMnull1)-th set of the first transmission lines, M being an integral between 1 and N.

    Abstract translation: 一种液晶显示器(LCD)接口,包括多个第一传输线,包括N组传输线,每组第一传输线与形成在LCD装置中的像素相关联,以及多个第二传输线,每个 耦合到所述多个第一传输线中的一个,所述多个第二传输线包括以奇数和偶数组交替的多个集合,每组第二传输线对应于多个第一传输线, 并且每个集合包括多个子集,每个子​​集与形成在LCD装置中的像素相关联,其中第二传输线的奇数组中的每一个的第M个子集耦合到第M个集合的第 第一传输线和第二传输线的偶数组的第M个子集耦合到第(N-M + 1)个第一传输线组,M是一个积分 l在1和N.

    Structure of TFT planar display panel and process for manufacturing the same
    5.
    发明申请
    Structure of TFT planar display panel and process for manufacturing the same 有权
    TFT平面显示面板的结构及其制造方法

    公开(公告)号:US20030230748A1

    公开(公告)日:2003-12-18

    申请号:US10321306

    申请日:2002-12-17

    Inventor: An Shih

    Abstract: A structure of a thin film transistor (TFT) planar display panel is disclosed. The structure includes a light-transmissible substrate, a buffer layer formed on the light-transmissible substrate, a top-gate TFT structure formed on the buffer layer and including a channel region, and a light-shielding structure formed between a back light source and the top-gate TFT structure, and substantially aligned with the channel region for protecting the channel region from illumination of the back light source. The process for manufacturing a TFT planar display panel is also disclosed.

    Abstract translation: 公开了薄膜晶体管(TFT)平面显示面板的结构。 该结构包括透光衬底,形成在透光衬底上的缓冲层,形成在缓冲层上并包括沟道区的顶栅TFT结构,以及形成在背光源和 顶栅TFT结构,并且基本上与沟道区对准,用于保护沟道区免受背光源的照射。 还公开了制造TFT平面显示面板的工艺。

    ESD protection circuit and display panel using the same
    6.
    发明申请
    ESD protection circuit and display panel using the same 有权
    ESD保护电路和显示面板使用相同

    公开(公告)号:US20040264080A1

    公开(公告)日:2004-12-30

    申请号:US10841158

    申请日:2004-05-07

    CPC classification number: H01L27/0285 G02F1/136204 H02H9/046

    Abstract: An ESD protection circuit for low temperature poly-silicon thin film transistor panel and a display panel using the same. The feature of the ESD protection circuit comprises an ESD detection circuit disposed between a first power line and a second power line, for outputting an enable signal when an ESD event occurs in the first power line; and a discharge device having a control terminal coupled to the output of the ESD detection circuit, for providing a discharge path between the first and second power lines when the control terminal receives the enable signal.

    Abstract translation: 一种用于低温多晶硅薄膜晶体管面板的ESD保护电路和使用该ESD保护电路的显示面板。 ESD保护电路的特征包括:设置在第一电力线和第二电力线之间的ESD检测电路,用于当在第一电力线中发生ESD事件时输出使能信号; 以及放电装置,其具有耦合到所述ESD检测电路的输出的控制端子,用于当所述控制端子接收到使能信号时,在所述第一和第二电源线之间提供放电路径。

    Low-temperature polysilicon thin film transistor having buried LDD structure and process for producing same
    7.
    发明申请
    Low-temperature polysilicon thin film transistor having buried LDD structure and process for producing same 审中-公开
    具有埋入LDD结构的低温多晶硅薄膜晶体管及其制造方法

    公开(公告)号:US20030222305A1

    公开(公告)日:2003-12-04

    申请号:US10262740

    申请日:2002-10-02

    Inventor: An Shih

    CPC classification number: H01L29/66757 H01L29/78621

    Abstract: A low-temperature polysilicon thin film transistor having a buried LDD structure is provided. Two heavily doped regions are formed in a semiconductor layer and distributed just below a surface of the semiconductor layer. Two LDD regions are both sandwiched between the two heavily doped regions in a direction substantially parallel to the surface of semiconductor layer, and separated from the surface of the semiconductor layer by a portion of the semiconductor layer. The process for producing such a thin film transistor is also provided. A first, a second and a third doping materials are injected into a semiconductor layer in different directions to form heavily doped regions and LDD regions.

    Abstract translation: 提供具有埋入LDD结构的低温多晶硅薄膜晶体管。 在半导体层中形成两个重掺杂区域,并分布在半导体层的表面正下方。 两个LDD区域在基本上平行于半导体层的表面的方向上夹在两个重掺杂区域之间,并且通过半导体层的一部分与半导体层的表面分离。 还提供了制造这种薄膜晶体管的工艺。 将第一,第二和第三掺杂材料注入不同方向的半导体层中以形成重掺杂区域和LDD区域。

    AM-OEL display, electronic system comprising the AM-OEL display and a testing method thereof
    8.
    发明申请
    AM-OEL display, electronic system comprising the AM-OEL display and a testing method thereof 有权
    AM-OEL显示器,包括AM-OEL显示器的电子系统及其测试方法

    公开(公告)号:US20040212571A1

    公开(公告)日:2004-10-28

    申请号:US10831400

    申请日:2004-04-23

    CPC classification number: G09G3/006 G09G3/3208 G09G2300/0842

    Abstract: A pixel testing method is provided. The pixel testing method is adapted to measure device parameters within each pixel of a display. Before plating a lighting device into each pixel, a capacitor is formed such that one end of the capacitor is connected to an open-circuit terminal of an electronic device while the other end of the capacitor is connected to an added common line (or the original scan line or data line of the display). The parameters of the electronic device connected to the lighting device are tested through a charging/discharging of the capacitor so that all the devices within a pixel can be tested before forming organic functional layer in every pixel.

    Abstract translation: 提供像素测试方法。 像素测试方法适于测量显示器每个像素内的设备参数。 在将照明装置电镀到每个像素之前,形成电容器,使得电容器的一端连接到电子设备的开路端子,而电容器的另一端连接到添加的公共线(或原始 扫描线或数据线)。 连接到照明装置的电子设备的参数通过电容器的充电/放电来测试,使得可以在形成每个像素内的有机功能层之前对像素内的所有器件进行测试。

    Process for producing thin film transistor
    9.
    发明申请
    Process for producing thin film transistor 审中-公开
    制造薄膜晶体管的工艺

    公开(公告)号:US20040201068A1

    公开(公告)日:2004-10-14

    申请号:US10836036

    申请日:2004-04-30

    Inventor: An Shih

    Abstract: In a process for forming a thin film transistor, a gate insulator layer is formed on a semiconductor layer. A gate structure is formed on the gate insulator layer, and source/drain structures are formed in the semiconductor layer. The source/drain structures are spaced from each other by a channel region. A first kind of doping material is injected into a first end portion of the channel region in a first direction of a first angle from a surface of the semiconductor layer to form a first LDD structure, and a second kind of doping material is injected into the first end portion of the channel region in a second direction of a second angle from the surface of the semiconductor layer to form a first halo structure in contact with the first LDD structure.

    Abstract translation: 在形成薄膜晶体管的工艺中,在半导体层上形成栅极绝缘体层。 在栅极绝缘体层上形成栅极结构,在半导体层中形成源极/漏极结构。 源极/漏极结构通过沟道区彼此间隔开。 第一种掺杂材料从半导体层的表面沿第一角度的第一方向注入到沟道区的第一端部分中,以形成第一LDD结构,并且将第二类掺杂材料注入到 所述沟道区的第一端部与所述半导体层的表面成第二角度的第二方向,以形成与所述第一LDD结构接触的第一卤素结构。

    LDD STRUCTURE OF THIN FILM TRANSISTOR AND PROCESS FOR PRODUCING SAME
    10.
    发明申请
    LDD STRUCTURE OF THIN FILM TRANSISTOR AND PROCESS FOR PRODUCING SAME 有权
    薄膜晶体管的LDD结构及其制造方法

    公开(公告)号:US20040065924A1

    公开(公告)日:2004-04-08

    申请号:US10263077

    申请日:2002-10-02

    Inventor: An Shih

    Abstract: A thin film transistor having a single LDD structure is provided. The single LDD structure is disposed between source/drain structures, and having a first side adjacent to a first one of the source/drain structures and a second side spaced from a second one of the source/drain structures by essentially a semiconductor material. Another thin film transistor having a first kind of LDD and a second kind of LDD structure is also provided. The second kind of LDD structure is adjacent to the first kind of LDD structure. The process for manufacturing such thin film transistor is also disclosed.

    Abstract translation: 提供具有单个LDD结构的薄膜晶体管。 单个LDD结构设置在源极/漏极结构之间,并且具有与源极/漏极结构中的第一个相邻的第一侧和通过基本上半导体材料与源/漏极结构中的第二侧间隔开的第二侧。 还提供了具有第一种类型的LDD和另一种LDD结构的另一薄膜晶体管。 第二种LDD结构与第一种LDD结构相邻。 还公开了制造这种薄膜晶体管的工艺。

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